Import QEMU upstream snapshot d2e570c

Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
2026-08-31 02:15:30 +02:00
commit cf256aa081
11315 changed files with 3598369 additions and 0 deletions
@@ -0,0 +1,4 @@
+TARGET_ARCH=aarch64
+TARGET_BASE_ARCH=arm
+TARGET_XML_FILES= aarch64-core.xml aarch64-fpu.xml aarch64-pauth.xml aarch64-mte.xml aarch64-sme2.xml
+TARGET_LONG_BITS=64
@@ -0,0 +1,9 @@
+TARGET_ARCH=aarch64
+TARGET_BASE_ARCH=arm
+TARGET_XML_FILES= aarch64-core.xml aarch64-fpu.xml aarch64-pauth.xml aarch64-mte.xml aarch64-sme2.xml
+TARGET_HAS_BFLT=y
+CONFIG_SEMIHOSTING=y
+CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
+TARGET_SYSTBL_ABI=common,64,renameat,rlimit,memfd_secret
+TARGET_SYSTBL=syscall_64.tbl
+TARGET_LONG_BITS=64
@@ -0,0 +1,27 @@
+/*
+ * QEMU binary/target API (qemu-system-aarch64)
+ *
+ *  Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target-info-impl.h"
+#include "qemu/target-info-init.h"
+#include "hw/arm/machines-qom.h"
+#include "target/arm/cpu-qom.h"
+#include "target/arm/cpu-param.h"
+
+static const TargetInfo target_info_aarch64_system = {
+    .target_name = "aarch64",
+    .target_arch = SYS_EMU_TARGET_AARCH64,
+    .long_bits = 64,
+    .cpu_type = TYPE_ARM_CPU,
+    .machine_typename = TYPE_TARGET_AARCH64_MACHINE,
+    .endianness = ENDIAN_MODE_LITTLE,
+    .page_bits_vary = true,
+    .page_bits_init = TARGET_PAGE_BITS_LEGACY,
+};
+
+target_info_init(target_info_aarch64_system)
@@ -0,0 +1,8 @@
+TARGET_ARCH=aarch64
+TARGET_BASE_ARCH=arm
+TARGET_KVM_HAVE_GUEST_DEBUG=y
+TARGET_XML_FILES= aarch64-core.xml aarch64-fpu.xml arm-core.xml arm-vfp.xml arm-vfp3.xml arm-vfp-sysregs.xml arm-neon.xml arm-m-profile.xml arm-m-profile-mve.xml aarch64-pauth.xml aarch64-sme2.xml
+# needed by boot.c
+TARGET_NEED_FDT=y
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,10 @@
+TARGET_ARCH=aarch64
+TARGET_BASE_ARCH=arm
+TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES= aarch64-core.xml aarch64-fpu.xml aarch64-pauth.xml aarch64-mte.xml aarch64-sme2.xml
+TARGET_HAS_BFLT=y
+CONFIG_SEMIHOSTING=y
+CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
+TARGET_SYSTBL_ABI=common,64,renameat,rlimit,memfd_secret
+TARGET_SYSTBL=syscall_64.tbl
+TARGET_LONG_BITS=64
@@ -0,0 +1,7 @@
+TARGET_ARCH=alpha
+TARGET_SYSTBL_ABI=common
+TARGET_SYSTBL=syscall.tbl
+TARGET_LONG_BITS=64
+TARGET_XML_FILES= alpha-core.xml
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,5 @@
+TARGET_ARCH=alpha
+TARGET_LONG_BITS=64
+TARGET_XML_FILES= alpha-core.xml
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,3 @@
+TARGET_ARCH=arm
+TARGET_XML_FILES= arm-core.xml arm-vfp.xml arm-vfp3.xml arm-vfp-sysregs.xml arm-neon.xml arm-m-profile.xml arm-m-profile-mve.xml
+TARGET_LONG_BITS=32
@@ -0,0 +1,8 @@
+TARGET_ARCH=arm
+TARGET_SYSTBL_ABI=common,oabi
+TARGET_SYSTBL=syscall.tbl
+TARGET_XML_FILES= arm-core.xml arm-vfp.xml arm-vfp3.xml arm-vfp-sysregs.xml arm-neon.xml arm-m-profile.xml arm-m-profile-mve.xml
+TARGET_HAS_BFLT=y
+CONFIG_SEMIHOSTING=y
+CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
+TARGET_LONG_BITS=32
@@ -0,0 +1,27 @@
+/*
+ * QEMU binary/target API (qemu-system-arm)
+ *
+ *  Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target-info-impl.h"
+#include "qemu/target-info-init.h"
+#include "hw/arm/machines-qom.h"
+#include "target/arm/cpu-qom.h"
+#include "target/arm/cpu-param.h"
+
+static const TargetInfo target_info_arm_system = {
+    .target_name = "arm",
+    .target_arch = SYS_EMU_TARGET_ARM,
+    .long_bits = 32,
+    .cpu_type = TYPE_ARM_CPU,
+    .machine_typename = TYPE_TARGET_ARM_MACHINE,
+    .endianness = ENDIAN_MODE_LITTLE,
+    .page_bits_vary = true,
+    .page_bits_init = TARGET_PAGE_BITS_LEGACY,
+};
+
+target_info_init(target_info_arm_system)
@@ -0,0 +1,6 @@
+TARGET_ARCH=arm
+TARGET_XML_FILES= arm-core.xml arm-vfp.xml arm-vfp3.xml arm-vfp-sysregs.xml arm-neon.xml arm-m-profile.xml arm-m-profile-mve.xml
+# needed by boot.c
+TARGET_NEED_FDT=y
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,9 @@
+TARGET_ARCH=arm
+TARGET_SYSTBL_ABI=common,oabi
+TARGET_SYSTBL=syscall.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES= arm-core.xml arm-vfp.xml arm-vfp3.xml arm-vfp-sysregs.xml arm-neon.xml arm-m-profile.xml arm-m-profile-mve.xml
+TARGET_HAS_BFLT=y
+CONFIG_SEMIHOSTING=y
+CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
+TARGET_LONG_BITS=32
@@ -0,0 +1,4 @@
+TARGET_ARCH=avr
+TARGET_XML_FILES= avr-cpu.xml
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,6 @@
+TARGET_ARCH=hexagon
+TARGET_XML_FILES=hexagon-core.xml hexagon-hvx.xml
+TARGET_SYSTBL=syscall.tbl
+TARGET_SYSTBL_ABI=common,32,hexagon,time32,stat64,rlimit,renameat
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,8 @@
+# Default configuration for hexagon-softmmu
+
+TARGET_ARCH=hexagon
+TARGET_XML_FILES=hexagon-core.xml hexagon-hvx.xml
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
+TARGET_NEED_FDT=y
@@ -0,0 +1,8 @@
+TARGET_ARCH=hppa
+TARGET_ABI32=y
+TARGET_SYSTBL_ABI=common,32
+TARGET_SYSTBL=syscall.tbl
+TARGET_BIG_ENDIAN=y
+# Compromise to ease maintenance vs system mode
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,4 @@
+TARGET_ARCH=hppa
+TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,3 @@
+TARGET_ARCH=i386
+TARGET_XML_FILES= i386-32bit.xml
+TARGET_LONG_BITS=32
@@ -0,0 +1,5 @@
+TARGET_ARCH=i386
+TARGET_SYSTBL_ABI=i386
+TARGET_SYSTBL=syscall_32.tbl
+TARGET_XML_FILES= i386-32bit.xml i386-32bit-linux.xml
+TARGET_LONG_BITS=32
@@ -0,0 +1,6 @@
+TARGET_ARCH=i386
+TARGET_KVM_HAVE_GUEST_DEBUG=y
+TARGET_KVM_HAVE_RESET_PARKED_VCPU=y
+TARGET_XML_FILES= i386-32bit.xml
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,8 @@
+# Default configuration for loongarch64-linux-user
+TARGET_ARCH=loongarch64
+TARGET_BASE_ARCH=loongarch
+TARGET_XML_FILES=loongarch-base64.xml loongarch-fpu.xml loongarch-lsx.xml loongarch-lasx.xml
+TARGET_SYSTBL=syscall.tbl
+TARGET_SYSTBL_ABI=common,64
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,9 @@
+TARGET_ARCH=loongarch64
+TARGET_BASE_ARCH=loongarch
+TARGET_KVM_HAVE_GUEST_DEBUG=y
+TARGET_XML_FILES= loongarch-base32.xml loongarch-base64.xml loongarch-fpu.xml loongarch-lsx.xml loongarch-lasx.xml
+# all boards require libfdt
+TARGET_NEED_FDT=y
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,7 @@
+TARGET_ARCH=m68k
+TARGET_SYSTBL_ABI=common
+TARGET_SYSTBL=syscall.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES= cf-core.xml cf-fp.xml m68k-core.xml m68k-fp.xml
+TARGET_HAS_BFLT=y
+TARGET_LONG_BITS=32
@@ -0,0 +1,4 @@
+TARGET_ARCH=m68k
+TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES= cf-core.xml cf-fp.xml m68k-core.xml m68k-fp.xml
+TARGET_LONG_BITS=32
@@ -0,0 +1,6 @@
+foreach target : [
+      'arm-softmmu', 'aarch64-softmmu',
+      'riscv32-softmmu', 'riscv64-softmmu'
+  ]
+  config_target_info += {target : files(target + '.c')}
+endforeach
@@ -0,0 +1,7 @@
+TARGET_ARCH=microblaze
+TARGET_SYSTBL_ABI=common
+TARGET_SYSTBL=syscall.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_HAS_BFLT=y
+TARGET_XML_FILES=microblaze-core.xml microblaze-stack-protect.xml
+TARGET_LONG_BITS=32
@@ -0,0 +1,7 @@
+TARGET_ARCH=microblaze
+TARGET_BIG_ENDIAN=y
+# needed by boot.c
+TARGET_NEED_FDT=y
+TARGET_XML_FILES=microblaze-core.xml microblaze-stack-protect.xml
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,6 @@
+TARGET_ARCH=microblaze
+TARGET_SYSTBL_ABI=common
+TARGET_SYSTBL=syscall.tbl
+TARGET_HAS_BFLT=y
+TARGET_XML_FILES=microblaze-core.xml microblaze-stack-protect.xml
+TARGET_LONG_BITS=32
@@ -0,0 +1,6 @@
+TARGET_ARCH=mips
+TARGET_ABI_MIPSO32=y
+TARGET_SYSTBL_ABI=o32
+TARGET_SYSTBL=syscall_o32.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=32
@@ -0,0 +1,4 @@
+TARGET_ARCH=mips
+TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,7 @@
+TARGET_ARCH=mips64
+TARGET_ABI_MIPSN64=y
+TARGET_BASE_ARCH=mips
+TARGET_SYSTBL_ABI=n64
+TARGET_SYSTBL=syscall_n64.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=64
@@ -0,0 +1,5 @@
+TARGET_ARCH=mips64
+TARGET_BASE_ARCH=mips
+TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,6 @@
+TARGET_ARCH=mips64
+TARGET_ABI_MIPSN64=y
+TARGET_BASE_ARCH=mips
+TARGET_SYSTBL_ABI=n64
+TARGET_SYSTBL=syscall_n64.tbl
+TARGET_LONG_BITS=64
@@ -0,0 +1,4 @@
+TARGET_ARCH=mips64
+TARGET_BASE_ARCH=mips
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,5 @@
+TARGET_ARCH=mips
+TARGET_ABI_MIPSO32=y
+TARGET_SYSTBL_ABI=o32
+TARGET_SYSTBL=syscall_o32.tbl
+TARGET_LONG_BITS=32
@@ -0,0 +1,3 @@
+TARGET_ARCH=mips
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,8 @@
+TARGET_ARCH=mips64
+TARGET_ABI_MIPSN32=y
+TARGET_ABI32=y
+TARGET_BASE_ARCH=mips
+TARGET_SYSTBL_ABI=n32
+TARGET_SYSTBL=syscall_n32.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=64
@@ -0,0 +1,7 @@
+TARGET_ARCH=mips64
+TARGET_ABI_MIPSN32=y
+TARGET_ABI32=y
+TARGET_BASE_ARCH=mips
+TARGET_SYSTBL_ABI=n32
+TARGET_SYSTBL=syscall_n32.tbl
+TARGET_LONG_BITS=64
@@ -0,0 +1,7 @@
+TARGET_ARCH=or1k
+TARGET_BIG_ENDIAN=y
+TARGET_SYSTBL_ABI=common,32,or1k,time32,stat64,rlimit,renameat
+TARGET_SYSTBL=syscall.tbl
+TARGET_XML_FILES= or1k-core.xml
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,8 @@
+TARGET_ARCH=or1k
+TARGET_BIG_ENDIAN=y
+# needed by boot.c and all boards
+TARGET_NEED_FDT=y
+TARGET_XML_FILES= or1k-core.xml
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,6 @@
+TARGET_ARCH=ppc
+TARGET_SYSTBL_ABI=common,nospu,32
+TARGET_SYSTBL=syscall.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES= power-core.xml power-fpu.xml power-altivec.xml power-spe.xml
+TARGET_LONG_BITS=32
@@ -0,0 +1,5 @@
+TARGET_ARCH=ppc
+TARGET_BIG_ENDIAN=y
+TARGET_KVM_HAVE_GUEST_DEBUG=y
+TARGET_XML_FILES= power-core.xml power-fpu.xml power-altivec.xml power-spe.xml
+TARGET_LONG_BITS=32
@@ -0,0 +1,8 @@
+TARGET_ARCH=ppc64
+TARGET_BASE_ARCH=ppc
+TARGET_ABI_DIR=ppc
+TARGET_SYSTBL_ABI=common,nospu,64
+TARGET_SYSTBL=syscall.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES= power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml
+TARGET_LONG_BITS=64
@@ -0,0 +1,8 @@
+TARGET_ARCH=ppc64
+TARGET_BASE_ARCH=ppc
+TARGET_BIG_ENDIAN=y
+TARGET_KVM_HAVE_GUEST_DEBUG=y
+TARGET_XML_FILES= power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml
+# all boards require libfdt
+TARGET_NEED_FDT=y
+TARGET_LONG_BITS=64
@@ -0,0 +1,7 @@
+TARGET_ARCH=ppc64
+TARGET_BASE_ARCH=ppc
+TARGET_ABI_DIR=ppc
+TARGET_SYSTBL_ABI=common,nospu,64
+TARGET_SYSTBL=syscall.tbl
+TARGET_XML_FILES= power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml
+TARGET_LONG_BITS=64
@@ -0,0 +1,11 @@
+TARGET_ARCH=riscv32
+TARGET_BASE_ARCH=riscv
+TARGET_ABI_DIR=riscv
+TARGET_XML_FILES= riscv-32bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml riscv-32bit-virtual.xml
+CONFIG_SEMIHOSTING=y
+CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
+TARGET_SYSTBL_ABI=32
+TARGET_SYSTBL_ABI=common,32,riscv,memfd_secret
+TARGET_SYSTBL=syscall.tbl
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,26 @@
+/*
+ * QEMU binary/target API (qemu-system-riscv32)
+ *
+ *  Copyright (c) rev.ng Labs Srl.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target-info-impl.h"
+#include "qemu/target-info-init.h"
+#include "hw/riscv/machines-qom.h"
+#include "target/riscv/cpu-qom.h"
+#include "target/riscv/cpu-param.h"
+
+static const TargetInfo target_info_riscv32_system = {
+    .target_name = "riscv32",
+    .target_arch = SYS_EMU_TARGET_RISCV32,
+    .long_bits = 32,
+    .cpu_type = TYPE_RISCV_CPU,
+    .machine_typename = TYPE_TARGET_RISCV32_MACHINE,
+    .endianness = ENDIAN_MODE_LITTLE,
+    .page_bits_init = TARGET_PAGE_BITS,
+};
+
+target_info_init(target_info_riscv32_system)
@@ -0,0 +1,8 @@
+TARGET_ARCH=riscv32
+TARGET_BASE_ARCH=riscv
+TARGET_XML_FILES= riscv-32bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml riscv-32bit-virtual.xml
+# needed by boot.c
+TARGET_NEED_FDT=y
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,6 @@
+TARGET_ARCH=riscv64
+TARGET_BASE_ARCH=riscv
+TARGET_ABI_DIR=riscv
+TARGET_XML_FILES= riscv-64bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml riscv-64bit-virtual.xml
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,11 @@
+TARGET_ARCH=riscv64
+TARGET_BASE_ARCH=riscv
+TARGET_ABI_DIR=riscv
+TARGET_XML_FILES= riscv-64bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml riscv-64bit-virtual.xml
+CONFIG_SEMIHOSTING=y
+CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
+TARGET_SYSTBL_ABI=64
+TARGET_SYSTBL_ABI=common,64,riscv,rlimit,memfd_secret
+TARGET_SYSTBL=syscall.tbl
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,26 @@
+/*
+ * QEMU binary/target API (qemu-system-riscv64)
+ *
+ *  Copyright (c) rev.ng Labs Srl.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target-info-impl.h"
+#include "qemu/target-info-init.h"
+#include "hw/riscv/machines-qom.h"
+#include "target/riscv/cpu-qom.h"
+#include "target/riscv/cpu-param.h"
+
+static const TargetInfo target_info_riscv64_system = {
+    .target_name = "riscv64",
+    .target_arch = SYS_EMU_TARGET_RISCV64,
+    .long_bits = 64,
+    .cpu_type = TYPE_RISCV_CPU,
+    .machine_typename = TYPE_TARGET_RISCV64_MACHINE,
+    .endianness = ENDIAN_MODE_LITTLE,
+    .page_bits_init = TARGET_PAGE_BITS,
+};
+
+target_info_init(target_info_riscv64_system)
@@ -0,0 +1,9 @@
+TARGET_ARCH=riscv64
+TARGET_BASE_ARCH=riscv
+TARGET_KVM_HAVE_GUEST_DEBUG=y
+TARGET_XML_FILES= riscv-64bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml riscv-64bit-virtual.xml riscv-32bit-cpu.xml riscv-32bit-virtual.xml
+# needed by boot.c
+TARGET_NEED_FDT=y
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,7 @@
+TARGET_ARCH=rx
+TARGET_XML_FILES= rx-core.xml
+# all boards require libfdt
+TARGET_NEED_FDT=y
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,7 @@
+TARGET_ARCH=s390x
+TARGET_SYSTBL_ABI=common,64
+TARGET_SYSTBL=syscall.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES= s390x-core64.xml s390-acr.xml s390-fpr.xml s390-vx.xml s390-cr.xml s390-virt.xml s390-virt-kvm.xml s390-gs.xml
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,7 @@
+TARGET_ARCH=s390x
+TARGET_BIG_ENDIAN=y
+TARGET_KVM_HAVE_GUEST_DEBUG=y
+TARGET_XML_FILES= s390x-core64.xml s390-acr.xml s390-fpr.xml s390-vx.xml s390-cr.xml s390-virt.xml s390-virt-kvm.xml s390-gs.xml
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,5 @@
+TARGET_ARCH=sh4
+TARGET_SYSTBL_ABI=common
+TARGET_SYSTBL=syscall.tbl
+TARGET_HAS_BFLT=y
+TARGET_LONG_BITS=32
@@ -0,0 +1,3 @@
+TARGET_ARCH=sh4
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,6 @@
+TARGET_ARCH=sh4
+TARGET_SYSTBL_ABI=common
+TARGET_SYSTBL=syscall.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_HAS_BFLT=y
+TARGET_LONG_BITS=32
@@ -0,0 +1,4 @@
+TARGET_ARCH=sh4
+TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,7 @@
+TARGET_ARCH=sparc
+TARGET_SYSTBL_ABI=common,32
+TARGET_SYSTBL=syscall.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES=sparc32-cpu.xml sparc32-fpu.xml sparc32-cp0.xml
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,6 @@
+TARGET_ARCH=sparc
+TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES=sparc32-cpu.xml sparc32-fpu.xml sparc32-cp0.xml
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,10 @@
+TARGET_ARCH=sparc64
+TARGET_ABI32=y
+TARGET_BASE_ARCH=sparc
+TARGET_ABI_DIR=sparc
+TARGET_SYSTBL_ABI=common,32
+TARGET_SYSTBL=syscall.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES=sparc64-cpu.xml sparc64-fpu.xml sparc64-cp0.xml
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,9 @@
+TARGET_ARCH=sparc64
+TARGET_BASE_ARCH=sparc
+TARGET_ABI_DIR=sparc
+TARGET_SYSTBL_ABI=common,64
+TARGET_SYSTBL=syscall.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES=sparc64-cpu.xml sparc64-fpu.xml sparc64-cp0.xml
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,7 @@
+TARGET_ARCH=sparc64
+TARGET_BASE_ARCH=sparc
+TARGET_BIG_ENDIAN=y
+TARGET_XML_FILES=sparc64-cpu.xml sparc64-fpu.xml sparc64-cp0.xml
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,4 @@
+TARGET_ARCH=tricore
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
+TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
@@ -0,0 +1,4 @@
+TARGET_ARCH=x86_64
+TARGET_BASE_ARCH=i386
+TARGET_XML_FILES= i386-64bit.xml
+TARGET_LONG_BITS=64
@@ -0,0 +1,6 @@
+TARGET_ARCH=x86_64
+TARGET_BASE_ARCH=i386
+TARGET_SYSTBL_ABI=common,64
+TARGET_SYSTBL=syscall_64.tbl
+TARGET_XML_FILES= i386-64bit.xml i386-64bit-linux.xml
+TARGET_LONG_BITS=64
@@ -0,0 +1,7 @@
+TARGET_ARCH=x86_64
+TARGET_BASE_ARCH=i386
+TARGET_KVM_HAVE_GUEST_DEBUG=y
+TARGET_KVM_HAVE_RESET_PARKED_VCPU=y
+TARGET_XML_FILES= i386-64bit.xml i386-64bit-apx.xml
+TARGET_LONG_BITS=64
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,5 @@
+TARGET_ARCH=xtensa
+TARGET_SYSTBL_ABI=common
+TARGET_SYSTBL=syscall.tbl
+TARGET_HAS_BFLT=y
+TARGET_LONG_BITS=32
@@ -0,0 +1,3 @@
+TARGET_ARCH=xtensa
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
@@ -0,0 +1,6 @@
+TARGET_ARCH=xtensa
+TARGET_SYSTBL_ABI=common
+TARGET_SYSTBL=syscall.tbl
+TARGET_BIG_ENDIAN=y
+TARGET_HAS_BFLT=y
+TARGET_LONG_BITS=32
@@ -0,0 +1,4 @@
+TARGET_ARCH=xtensa
+TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=32
+TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y