Import QEMU upstream snapshot d2e570c

Upstream: https://gitlab.com/qemu-project/qemu.git

Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
This commit is contained in:
2026-08-31 02:15:30 +02:00
commit cf256aa081
11315 changed files with 3598369 additions and 0 deletions
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include $(BUILD_DIR)/tests/tcg/aarch64-linux-user/config-target.mak
SUBDIR = $(SRC_PATH)/linux-user/aarch64
VPATH += $(SUBDIR)
all: $(SUBDIR)/vdso-be.so $(SUBDIR)/vdso-le.so
LDFLAGS = -nostdlib -shared -Wl,-h,linux-vdso.so.1 \
-Wl,--build-id=sha1 -Wl,--hash-style=both \
-Wl,-z,max-page-size=4096 -Wl,-T,$(SUBDIR)/vdso.ld
$(SUBDIR)/vdso-be.so: vdso.S vdso.ld
$(CC) -o $@ $(LDFLAGS) -mbig-endian $<
$(SUBDIR)/vdso-le.so: vdso.S vdso.ld
$(CC) -o $@ $(LDFLAGS) -mlittle-endian $<
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/*
* qemu user cpu loop
*
* Copyright (c) 2003-2008 Fabrice Bellard
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
#include "qemu.h"
#include "user-internals.h"
#include "user/cpu_loop.h"
#include "signal-common.h"
#include "qemu/guest-random.h"
#include "semihosting/common-semi.h"
#include "target/arm/syndrome.h"
#include "target/arm/cpu-features.h"
/* Use the exception syndrome to map a cpu exception to a signal. */
static void signal_for_exception(CPUARMState *env, vaddr addr)
{
uint32_t syn = env->exception.syndrome;
int si_code, si_signo;
/* Let signal delivery see that ESR is live. */
env->cp15.esr_el[1] = syn;
switch (syn_get_ec(syn)) {
case EC_DATAABORT:
case EC_INSNABORT:
/* Both EC have the same format for FSC, or close enough. */
switch (extract32(syn, 0, 6)) {
case 0x04 ... 0x07: /* Translation fault, level {0-3} */
si_signo = TARGET_SIGSEGV;
si_code = TARGET_SEGV_MAPERR;
break;
case 0x09 ... 0x0b: /* Access flag fault, level {1-3} */
case 0x0d ... 0x0f: /* Permission fault, level {1-3} */
si_signo = TARGET_SIGSEGV;
si_code = TARGET_SEGV_ACCERR;
break;
case 0x11: /* Synchronous Tag Check Fault */
si_signo = TARGET_SIGSEGV;
si_code = TARGET_SEGV_MTESERR;
break;
case 0x21: /* Alignment fault */
si_signo = TARGET_SIGBUS;
si_code = TARGET_BUS_ADRALN;
break;
default:
g_assert_not_reached();
}
break;
case EC_PCALIGNMENT:
si_signo = TARGET_SIGBUS;
si_code = TARGET_BUS_ADRALN;
break;
case EC_UNCATEGORIZED: /* E.g. undefined instruction */
case EC_SYSTEMREGISTERTRAP: /* E.g. inaccessible register */
case EC_SMETRAP: /* E.g. invalid insn in streaming state */
case EC_BTITRAP: /* E.g. invalid guarded branch target */
case EC_ILLEGALSTATE:
/*
* Illegal state happens via an ERET from a privileged mode,
* so is not normally possible from user-only. However, gdbstub
* is not prevented from writing CPSR_IL, aka PSTATE.IL, which
* would generate a trap from the next translated block.
* In the kernel, default case -> el0_inv -> bad_el0_sync.
*/
si_signo = TARGET_SIGILL;
si_code = TARGET_ILL_ILLOPC;
break;
case EC_PACFAIL:
si_signo = TARGET_SIGILL;
si_code = TARGET_ILL_ILLOPN;
break;
case EC_GCS:
si_signo = TARGET_SIGSEGV;
si_code = TARGET_SEGV_CPERR;
break;
case EC_MOP:
/*
* FIXME: The kernel fixes up wrong-option exceptions.
* For QEMU linux-user mode, you can only get these if
* the process is doing something silly (not executing
* the MOPS instructions in the required P/M/E sequence),
* so it is not a problem in practice that we do not.
*
* We ought ideally to implement the same "rewind to the
* start of the sequence" logic that the kernel does in
* arm64_mops_reset_regs(). In the meantime, deliver
* the guest a SIGILL, with the same ILLOPN si_code
* we've always used for this.
*/
si_signo = TARGET_SIGILL;
si_code = TARGET_ILL_ILLOPN;
break;
case EC_WFX_TRAP: /* user-only WFI implemented as NOP */
case EC_CP15RTTRAP: /* AArch32 */
case EC_CP15RRTTRAP: /* AArch32 */
case EC_CP14RTTRAP: /* AArch32 */
case EC_CP14DTTRAP: /* AArch32 */
case EC_ADVSIMDFPACCESSTRAP: /* user-only does not disable fpu */
case EC_FPIDTRAP: /* AArch32 */
case EC_PACTRAP: /* user-only does not disable pac regs */
case EC_BXJTRAP: /* AArch32 */
case EC_CP14RRTTRAP: /* AArch32 */
case EC_AA32_SVC: /* AArch32 */
case EC_AA32_HVC: /* AArch32 */
case EC_AA32_SMC: /* AArch32 */
case EC_AA64_SVC: /* generates EXCP_SWI */
case EC_AA64_HVC: /* user-only generates EC_UNCATEGORIZED */
case EC_AA64_SMC: /* user-only generates EC_UNCATEGORIZED */
case EC_SVEACCESSTRAP: /* user-only does not disable sve */
case EC_ERETTRAP: /* user-only generates EC_UNCATEGORIZED */
case EC_GPC: /* user-only has no EL3 gpc tables */
case EC_INSNABORT_SAME_EL: /* el0 cannot trap to el0 */
case EC_DATAABORT_SAME_EL: /* el0 cannot trap to el0 */
case EC_SPALIGNMENT: /* sp alignment checks not implemented */
case EC_AA32_FPTRAP: /* fp exceptions not implemented */
case EC_AA64_FPTRAP: /* fp exceptions not implemented */
case EC_SERROR: /* user-only does not have hw faults */
case EC_BREAKPOINT: /* user-only does not have hw debug */
case EC_BREAKPOINT_SAME_EL: /* user-only does not have hw debug */
case EC_SOFTWARESTEP: /* user-only does not have hw debug */
case EC_SOFTWARESTEP_SAME_EL: /* user-only does not have hw debug */
case EC_WATCHPOINT: /* user-only does not have hw debug */
case EC_WATCHPOINT_SAME_EL: /* user-only does not have hw debug */
case EC_AA32_BKPT: /* AArch32 */
case EC_VECTORCATCH: /* AArch32 */
case EC_AA64_BKPT: /* generates EXCP_BKPT */
default:
g_assert_not_reached();
}
force_sig_fault(si_signo, si_code, addr);
}
/* AArch64 main loop */
void cpu_loop(CPUARMState *env)
{
CPUState *cs = env_cpu(env);
int trapnr;
abi_long ret;
for (;;) {
cpu_exec_start(cs);
trapnr = cpu_exec(cs);
cpu_exec_end(cs);
qemu_process_cpu_events(cs);
switch (trapnr) {
case EXCP_SWI:
/* On syscall, PSTATE.ZA is preserved, PSTATE.SM is cleared. */
aarch64_set_svcr(env, 0, R_SVCR_SM_MASK);
ret = do_syscall(env,
env->xregs[8],
env->xregs[0],
env->xregs[1],
env->xregs[2],
env->xregs[3],
env->xregs[4],
env->xregs[5],
0, 0);
if (ret == -QEMU_ERESTARTSYS) {
env->pc -= 4;
} else if (ret != -QEMU_ESIGRETURN && ret != -QEMU_ESETPC) {
env->xregs[0] = ret;
}
break;
case EXCP_INTERRUPT:
/* just indicate that signals should be handled asap */
break;
case EXCP_UDEF:
signal_for_exception(env, env->pc);
break;
case EXCP_PREFETCH_ABORT:
case EXCP_DATA_ABORT:
signal_for_exception(env, env->exception.vaddress);
break;
case EXCP_DEBUG:
case EXCP_BKPT:
force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->pc);
break;
case EXCP_SEMIHOST:
do_common_semihosting(cs);
env->pc += 4;
break;
case EXCP_YIELD:
/* nothing to do here for user-mode, just resume guest code */
break;
case EXCP_ATOMIC:
cpu_exec_step_atomic(cs);
break;
default:
EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
abort();
}
/* Check for MTE asynchronous faults */
if (unlikely(env->cp15.tfsr_el[0])) {
env->cp15.tfsr_el[0] = 0;
force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_MTEAERR, 0);
}
process_pending_signals(env);
/* Exception return on AArch64 always clears the exclusive monitor,
* so any return to running guest code implies this.
*/
env->exclusive_addr = -1;
}
}
void init_main_thread(CPUState *cs, struct image_info *info)
{
CPUARMState *env = cpu_env(cs);
ARMCPU *cpu = env_archcpu(env);
if (!(arm_feature(env, ARM_FEATURE_AARCH64))) {
fprintf(stderr,
"The selected ARM CPU does not support 64 bit mode\n");
exit(EXIT_FAILURE);
}
env->pc = info->entry & ~0x3ULL;
env->xregs[31] = info->start_stack;
#if TARGET_BIG_ENDIAN
env->cp15.sctlr_el[1] |= SCTLR_E0E;
for (int i = 1; i < 4; ++i) {
env->cp15.sctlr_el[i] |= SCTLR_EE;
}
arm_rebuild_hflags(env);
#endif
if (cpu_isar_feature(aa64_pauth, cpu)) {
qemu_guest_getrandom_nofail(&env->keys, sizeof(env->keys));
}
}
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/* SPDX-License-Identifier: GPL-2.0-or-later */
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu.h"
#include "loader.h"
#include "target/arm/cpu-features.h"
#include "target_elf.h"
#include "elf.h"
const char *get_elf_cpu_model(uint32_t eflags)
{
return "any";
}
enum {
ARM_HWCAP_A64_FP = 1 << 0,
ARM_HWCAP_A64_ASIMD = 1 << 1,
ARM_HWCAP_A64_EVTSTRM = 1 << 2,
ARM_HWCAP_A64_AES = 1 << 3,
ARM_HWCAP_A64_PMULL = 1 << 4,
ARM_HWCAP_A64_SHA1 = 1 << 5,
ARM_HWCAP_A64_SHA2 = 1 << 6,
ARM_HWCAP_A64_CRC32 = 1 << 7,
ARM_HWCAP_A64_ATOMICS = 1 << 8,
ARM_HWCAP_A64_FPHP = 1 << 9,
ARM_HWCAP_A64_ASIMDHP = 1 << 10,
ARM_HWCAP_A64_CPUID = 1 << 11,
ARM_HWCAP_A64_ASIMDRDM = 1 << 12,
ARM_HWCAP_A64_JSCVT = 1 << 13,
ARM_HWCAP_A64_FCMA = 1 << 14,
ARM_HWCAP_A64_LRCPC = 1 << 15,
ARM_HWCAP_A64_DCPOP = 1 << 16,
ARM_HWCAP_A64_SHA3 = 1 << 17,
ARM_HWCAP_A64_SM3 = 1 << 18,
ARM_HWCAP_A64_SM4 = 1 << 19,
ARM_HWCAP_A64_ASIMDDP = 1 << 20,
ARM_HWCAP_A64_SHA512 = 1 << 21,
ARM_HWCAP_A64_SVE = 1 << 22,
ARM_HWCAP_A64_ASIMDFHM = 1 << 23,
ARM_HWCAP_A64_DIT = 1 << 24,
ARM_HWCAP_A64_USCAT = 1 << 25,
ARM_HWCAP_A64_ILRCPC = 1 << 26,
ARM_HWCAP_A64_FLAGM = 1 << 27,
ARM_HWCAP_A64_SSBS = 1 << 28,
ARM_HWCAP_A64_SB = 1 << 29,
ARM_HWCAP_A64_PACA = 1 << 30,
ARM_HWCAP_A64_PACG = 1ULL << 31,
ARM_HWCAP_A64_GCS = 1ULL << 32,
ARM_HWCAP_A64_CMPBR = 1ULL << 33,
ARM_HWCAP_A64_FPRCVT = 1ULL << 34,
ARM_HWCAP_A64_F8MM8 = 1ULL << 35,
ARM_HWCAP_A64_F8MM4 = 1ULL << 36,
ARM_HWCAP_A64_SVE_F16MM = 1ULL << 37,
ARM_HWCAP_A64_SVE_ELTPERM = 1ULL << 38,
ARM_HWCAP_A64_SVE_AES2 = 1ULL << 39,
ARM_HWCAP_A64_SVE_BFSCALE = 1ULL << 40,
ARM_HWCAP_A64_SVE2P2 = 1ULL << 41,
ARM_HWCAP_A64_SME2P2 = 1ULL << 42,
ARM_HWCAP_A64_SME_SBITPERM = 1ULL << 43,
ARM_HWCAP_A64_SME_AES = 1ULL << 44,
ARM_HWCAP_A64_SME_SFEXPA = 1ULL << 45,
ARM_HWCAP_A64_SME_STMOP = 1ULL << 46,
ARM_HWCAP_A64_SME_SMOP4 = 1ULL << 47,
ARM_HWCAP2_A64_DCPODP = 1 << 0,
ARM_HWCAP2_A64_SVE2 = 1 << 1,
ARM_HWCAP2_A64_SVEAES = 1 << 2,
ARM_HWCAP2_A64_SVEPMULL = 1 << 3,
ARM_HWCAP2_A64_SVEBITPERM = 1 << 4,
ARM_HWCAP2_A64_SVESHA3 = 1 << 5,
ARM_HWCAP2_A64_SVESM4 = 1 << 6,
ARM_HWCAP2_A64_FLAGM2 = 1 << 7,
ARM_HWCAP2_A64_FRINT = 1 << 8,
ARM_HWCAP2_A64_SVEI8MM = 1 << 9,
ARM_HWCAP2_A64_SVEF32MM = 1 << 10,
ARM_HWCAP2_A64_SVEF64MM = 1 << 11,
ARM_HWCAP2_A64_SVEBF16 = 1 << 12,
ARM_HWCAP2_A64_I8MM = 1 << 13,
ARM_HWCAP2_A64_BF16 = 1 << 14,
ARM_HWCAP2_A64_DGH = 1 << 15,
ARM_HWCAP2_A64_RNG = 1 << 16,
ARM_HWCAP2_A64_BTI = 1 << 17,
ARM_HWCAP2_A64_MTE = 1 << 18,
ARM_HWCAP2_A64_ECV = 1 << 19,
ARM_HWCAP2_A64_AFP = 1 << 20,
ARM_HWCAP2_A64_RPRES = 1 << 21,
ARM_HWCAP2_A64_MTE3 = 1 << 22,
ARM_HWCAP2_A64_SME = 1 << 23,
ARM_HWCAP2_A64_SME_I16I64 = 1 << 24,
ARM_HWCAP2_A64_SME_F64F64 = 1 << 25,
ARM_HWCAP2_A64_SME_I8I32 = 1 << 26,
ARM_HWCAP2_A64_SME_F16F32 = 1 << 27,
ARM_HWCAP2_A64_SME_B16F32 = 1 << 28,
ARM_HWCAP2_A64_SME_F32F32 = 1 << 29,
ARM_HWCAP2_A64_SME_FA64 = 1 << 30,
ARM_HWCAP2_A64_WFXT = 1ULL << 31,
ARM_HWCAP2_A64_EBF16 = 1ULL << 32,
ARM_HWCAP2_A64_SVE_EBF16 = 1ULL << 33,
ARM_HWCAP2_A64_CSSC = 1ULL << 34,
ARM_HWCAP2_A64_RPRFM = 1ULL << 35,
ARM_HWCAP2_A64_SVE2P1 = 1ULL << 36,
ARM_HWCAP2_A64_SME2 = 1ULL << 37,
ARM_HWCAP2_A64_SME2P1 = 1ULL << 38,
ARM_HWCAP2_A64_SME_I16I32 = 1ULL << 39,
ARM_HWCAP2_A64_SME_BI32I32 = 1ULL << 40,
ARM_HWCAP2_A64_SME_B16B16 = 1ULL << 41,
ARM_HWCAP2_A64_SME_F16F16 = 1ULL << 42,
ARM_HWCAP2_A64_MOPS = 1ULL << 43,
ARM_HWCAP2_A64_HBC = 1ULL << 44,
ARM_HWCAP2_A64_SVE_B16B16 = 1ULL << 45,
ARM_HWCAP2_A64_LRCPC3 = 1ULL << 46,
ARM_HWCAP2_A64_LSE128 = 1ULL << 47,
ARM_HWCAP2_A64_FPMR = 1ULL << 48,
ARM_HWCAP2_A64_LUT = 1ULL << 49,
ARM_HWCAP2_A64_FAMINMAX = 1ULL << 50,
ARM_HWCAP2_A64_F8CVT = 1ULL << 51,
ARM_HWCAP2_A64_F8FMA = 1ULL << 52,
ARM_HWCAP2_A64_F8DP4 = 1ULL << 53,
ARM_HWCAP2_A64_F8DP2 = 1ULL << 54,
ARM_HWCAP2_A64_F8E4M3 = 1ULL << 55,
ARM_HWCAP2_A64_F8E5M2 = 1ULL << 56,
ARM_HWCAP2_A64_SME_LUTV2 = 1ULL << 57,
ARM_HWCAP2_A64_SME_F8F16 = 1ULL << 58,
ARM_HWCAP2_A64_SME_F8F32 = 1ULL << 59,
ARM_HWCAP2_A64_SME_SF8FMA = 1ULL << 60,
ARM_HWCAP2_A64_SME_SF8DP4 = 1ULL << 61,
ARM_HWCAP2_A64_SME_SF8DP2 = 1ULL << 62,
ARM_HWCAP2_A64_POE = 1ULL << 63,
};
#define GET_FEATURE_ID(feat, hwcap) \
do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0)
abi_ulong get_elf_hwcap(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
abi_ulong hwcaps = 0;
hwcaps |= ARM_HWCAP_A64_FP;
hwcaps |= ARM_HWCAP_A64_ASIMD;
hwcaps |= ARM_HWCAP_A64_CPUID;
/* probe for the extra features */
GET_FEATURE_ID(aa64_aes, ARM_HWCAP_A64_AES);
GET_FEATURE_ID(aa64_pmull, ARM_HWCAP_A64_PMULL);
GET_FEATURE_ID(aa64_sha1, ARM_HWCAP_A64_SHA1);
GET_FEATURE_ID(aa64_sha256, ARM_HWCAP_A64_SHA2);
GET_FEATURE_ID(aa64_sha512, ARM_HWCAP_A64_SHA512);
GET_FEATURE_ID(aa64_crc32, ARM_HWCAP_A64_CRC32);
GET_FEATURE_ID(aa64_sha3, ARM_HWCAP_A64_SHA3);
GET_FEATURE_ID(aa64_sm3, ARM_HWCAP_A64_SM3);
GET_FEATURE_ID(aa64_sm4, ARM_HWCAP_A64_SM4);
GET_FEATURE_ID(aa64_fp16, ARM_HWCAP_A64_FPHP | ARM_HWCAP_A64_ASIMDHP);
GET_FEATURE_ID(aa64_lse, ARM_HWCAP_A64_ATOMICS);
GET_FEATURE_ID(aa64_lse2, ARM_HWCAP_A64_USCAT);
GET_FEATURE_ID(aa64_rdm, ARM_HWCAP_A64_ASIMDRDM);
GET_FEATURE_ID(aa64_dp, ARM_HWCAP_A64_ASIMDDP);
GET_FEATURE_ID(aa64_fcma, ARM_HWCAP_A64_FCMA);
GET_FEATURE_ID(aa64_sve, ARM_HWCAP_A64_SVE);
GET_FEATURE_ID(aa64_pauth, ARM_HWCAP_A64_PACA | ARM_HWCAP_A64_PACG);
GET_FEATURE_ID(aa64_fhm, ARM_HWCAP_A64_ASIMDFHM);
GET_FEATURE_ID(aa64_dit, ARM_HWCAP_A64_DIT);
GET_FEATURE_ID(aa64_jscvt, ARM_HWCAP_A64_JSCVT);
GET_FEATURE_ID(aa64_sb, ARM_HWCAP_A64_SB);
GET_FEATURE_ID(aa64_condm_4, ARM_HWCAP_A64_FLAGM);
GET_FEATURE_ID(aa64_dcpop, ARM_HWCAP_A64_DCPOP);
GET_FEATURE_ID(aa64_rcpc_8_3, ARM_HWCAP_A64_LRCPC);
GET_FEATURE_ID(aa64_rcpc_8_4, ARM_HWCAP_A64_ILRCPC);
GET_FEATURE_ID(aa64_gcs, ARM_HWCAP_A64_GCS);
GET_FEATURE_ID(aa64_cmpbr, ARM_HWCAP_A64_CMPBR);
GET_FEATURE_ID(aa64_f8mm8, ARM_HWCAP_A64_F8MM8);
GET_FEATURE_ID(aa64_f8mm4, ARM_HWCAP_A64_F8MM4);
GET_FEATURE_ID(aa64_ssve_aes, ARM_HWCAP_A64_SME_AES);
GET_FEATURE_ID(aa64_ssve_fexpa, ARM_HWCAP_A64_SME_SFEXPA);
GET_FEATURE_ID(aa64_fprcvt, ARM_HWCAP_A64_FPRCVT);
GET_FEATURE_ID(aa64_sme_mop4, ARM_HWCAP_A64_SME_SMOP4);
GET_FEATURE_ID(aa64_sme_tmop, ARM_HWCAP_A64_SME_STMOP);
return hwcaps;
}
abi_ulong get_elf_hwcap2(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
abi_ulong hwcaps = 0;
GET_FEATURE_ID(aa64_dcpodp, ARM_HWCAP2_A64_DCPODP);
GET_FEATURE_ID(aa64_sve2, ARM_HWCAP2_A64_SVE2);
GET_FEATURE_ID(aa64_sve_aes, ARM_HWCAP2_A64_SVEAES);
GET_FEATURE_ID(aa64_sve2_pmull128, ARM_HWCAP2_A64_SVEPMULL);
GET_FEATURE_ID(aa64_sve2_bitperm, ARM_HWCAP2_A64_SVEBITPERM);
GET_FEATURE_ID(aa64_sve2_sha3, ARM_HWCAP2_A64_SVESHA3);
GET_FEATURE_ID(aa64_sve2_sm4, ARM_HWCAP2_A64_SVESM4);
GET_FEATURE_ID(aa64_condm_5, ARM_HWCAP2_A64_FLAGM2);
GET_FEATURE_ID(aa64_frint, ARM_HWCAP2_A64_FRINT);
GET_FEATURE_ID(aa64_sve_i8mm, ARM_HWCAP2_A64_SVEI8MM);
GET_FEATURE_ID(aa64_sve_f32mm, ARM_HWCAP2_A64_SVEF32MM);
GET_FEATURE_ID(aa64_sve_f64mm, ARM_HWCAP2_A64_SVEF64MM);
GET_FEATURE_ID(aa64_sve_bf16, ARM_HWCAP2_A64_SVEBF16);
GET_FEATURE_ID(aa64_i8mm, ARM_HWCAP2_A64_I8MM);
GET_FEATURE_ID(aa64_bf16, ARM_HWCAP2_A64_BF16);
GET_FEATURE_ID(aa64_rndr, ARM_HWCAP2_A64_RNG);
GET_FEATURE_ID(aa64_bti, ARM_HWCAP2_A64_BTI);
GET_FEATURE_ID(aa64_mte, ARM_HWCAP2_A64_MTE);
GET_FEATURE_ID(aa64_mte3, ARM_HWCAP2_A64_MTE3);
GET_FEATURE_ID(aa64_sme, (ARM_HWCAP2_A64_SME |
ARM_HWCAP2_A64_SME_F32F32 |
ARM_HWCAP2_A64_SME_B16F32 |
ARM_HWCAP2_A64_SME_F16F32 |
ARM_HWCAP2_A64_SME_I8I32));
GET_FEATURE_ID(aa64_sme_f64f64, ARM_HWCAP2_A64_SME_F64F64);
GET_FEATURE_ID(aa64_sme_i16i64, ARM_HWCAP2_A64_SME_I16I64);
GET_FEATURE_ID(aa64_sme_fa64, ARM_HWCAP2_A64_SME_FA64);
GET_FEATURE_ID(aa64_hbc, ARM_HWCAP2_A64_HBC);
GET_FEATURE_ID(aa64_mops, ARM_HWCAP2_A64_MOPS);
GET_FEATURE_ID(aa64_sve2p1, ARM_HWCAP2_A64_SVE2P1);
GET_FEATURE_ID(aa64_sme2, (ARM_HWCAP2_A64_SME2 |
ARM_HWCAP2_A64_SME_I16I32 |
ARM_HWCAP2_A64_SME_BI32I32));
GET_FEATURE_ID(aa64_sme2p1, ARM_HWCAP2_A64_SME2P1);
GET_FEATURE_ID(aa64_sme_b16b16, ARM_HWCAP2_A64_SME_B16B16);
GET_FEATURE_ID(aa64_sme_f16f16, ARM_HWCAP2_A64_SME_F16F16);
GET_FEATURE_ID(aa64_sve_b16b16, ARM_HWCAP2_A64_SVE_B16B16);
GET_FEATURE_ID(aa64_cssc, ARM_HWCAP2_A64_CSSC);
GET_FEATURE_ID(aa64_lse128, ARM_HWCAP2_A64_LSE128);
GET_FEATURE_ID(aa64_faminmax, ARM_HWCAP2_A64_FAMINMAX);
GET_FEATURE_ID(aa64_fpmr, ARM_HWCAP2_A64_FPMR);
GET_FEATURE_ID(aa64_lut, ARM_HWCAP2_A64_LUT);
GET_FEATURE_ID(aa64_sme2p1_lutv2, ARM_HWCAP2_A64_SME_LUTV2);
GET_FEATURE_ID(aa64_f8cvt, ARM_HWCAP2_A64_F8CVT |
ARM_HWCAP2_A64_F8E4M3 |
ARM_HWCAP2_A64_F8E5M2);
GET_FEATURE_ID(aa64_f8fma, ARM_HWCAP2_A64_F8FMA);
GET_FEATURE_ID(aa64_f8dp4, ARM_HWCAP2_A64_F8DP4);
GET_FEATURE_ID(aa64_f8dp2, ARM_HWCAP2_A64_F8DP2);
GET_FEATURE_ID(aa64_ssve_f8fma, ARM_HWCAP2_A64_SME_SF8FMA);
GET_FEATURE_ID(aa64_ssve_f8dp4, ARM_HWCAP2_A64_SME_SF8DP4);
GET_FEATURE_ID(aa64_ssve_f8dp2, ARM_HWCAP2_A64_SME_SF8DP2);
GET_FEATURE_ID(aa64_sme_f8f32, ARM_HWCAP2_A64_SME_F8F32);
GET_FEATURE_ID(aa64_sme_f8f16, ARM_HWCAP2_A64_SME_F8F16);
return hwcaps;
}
const char *elf_hwcap_str(uint32_t bit)
{
static const char * const hwcap_str[] = {
[__builtin_ctz(ARM_HWCAP_A64_FP )] = "fp",
[__builtin_ctz(ARM_HWCAP_A64_ASIMD )] = "asimd",
[__builtin_ctz(ARM_HWCAP_A64_EVTSTRM )] = "evtstrm",
[__builtin_ctz(ARM_HWCAP_A64_AES )] = "aes",
[__builtin_ctz(ARM_HWCAP_A64_PMULL )] = "pmull",
[__builtin_ctz(ARM_HWCAP_A64_SHA1 )] = "sha1",
[__builtin_ctz(ARM_HWCAP_A64_SHA2 )] = "sha2",
[__builtin_ctz(ARM_HWCAP_A64_CRC32 )] = "crc32",
[__builtin_ctz(ARM_HWCAP_A64_ATOMICS )] = "atomics",
[__builtin_ctz(ARM_HWCAP_A64_FPHP )] = "fphp",
[__builtin_ctz(ARM_HWCAP_A64_ASIMDHP )] = "asimdhp",
[__builtin_ctz(ARM_HWCAP_A64_CPUID )] = "cpuid",
[__builtin_ctz(ARM_HWCAP_A64_ASIMDRDM)] = "asimdrdm",
[__builtin_ctz(ARM_HWCAP_A64_JSCVT )] = "jscvt",
[__builtin_ctz(ARM_HWCAP_A64_FCMA )] = "fcma",
[__builtin_ctz(ARM_HWCAP_A64_LRCPC )] = "lrcpc",
[__builtin_ctz(ARM_HWCAP_A64_DCPOP )] = "dcpop",
[__builtin_ctz(ARM_HWCAP_A64_SHA3 )] = "sha3",
[__builtin_ctz(ARM_HWCAP_A64_SM3 )] = "sm3",
[__builtin_ctz(ARM_HWCAP_A64_SM4 )] = "sm4",
[__builtin_ctz(ARM_HWCAP_A64_ASIMDDP )] = "asimddp",
[__builtin_ctz(ARM_HWCAP_A64_SHA512 )] = "sha512",
[__builtin_ctz(ARM_HWCAP_A64_SVE )] = "sve",
[__builtin_ctz(ARM_HWCAP_A64_ASIMDFHM)] = "asimdfhm",
[__builtin_ctz(ARM_HWCAP_A64_DIT )] = "dit",
[__builtin_ctz(ARM_HWCAP_A64_USCAT )] = "uscat",
[__builtin_ctz(ARM_HWCAP_A64_ILRCPC )] = "ilrcpc",
[__builtin_ctz(ARM_HWCAP_A64_FLAGM )] = "flagm",
[__builtin_ctz(ARM_HWCAP_A64_SSBS )] = "ssbs",
[__builtin_ctz(ARM_HWCAP_A64_SB )] = "sb",
[__builtin_ctz(ARM_HWCAP_A64_PACA )] = "paca",
[__builtin_ctz(ARM_HWCAP_A64_PACG )] = "pacg",
[__builtin_ctzll(ARM_HWCAP_A64_GCS )] = "gcs",
[__builtin_ctzll(ARM_HWCAP_A64_CMPBR )] = "cmpbr",
[__builtin_ctzll(ARM_HWCAP_A64_FPRCVT)] = "fprcvt",
[__builtin_ctzll(ARM_HWCAP_A64_F8MM8 )] = "f8mm8",
[__builtin_ctzll(ARM_HWCAP_A64_F8MM4 )] = "f8mm4",
[__builtin_ctzll(ARM_HWCAP_A64_SVE_F16MM)] = "svef16mm",
[__builtin_ctzll(ARM_HWCAP_A64_SVE_ELTPERM)] = "sveeltperm",
[__builtin_ctzll(ARM_HWCAP_A64_SVE_AES2)] = "sveaes2",
[__builtin_ctzll(ARM_HWCAP_A64_SVE_BFSCALE)] = "svebfscale",
[__builtin_ctzll(ARM_HWCAP_A64_SVE2P2)] = "sve2p2",
[__builtin_ctzll(ARM_HWCAP_A64_SME2P2)] = "sme2p2",
[__builtin_ctzll(ARM_HWCAP_A64_SME_SBITPERM)] = "smesbitperm",
[__builtin_ctzll(ARM_HWCAP_A64_SME_AES)] = "smeaes",
[__builtin_ctzll(ARM_HWCAP_A64_SME_SFEXPA)] = "smesfexpa",
[__builtin_ctzll(ARM_HWCAP_A64_SME_STMOP)] = "smestmop",
[__builtin_ctzll(ARM_HWCAP_A64_SME_SMOP4)] = "smesmop4",
};
return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
}
const char *elf_hwcap2_str(uint32_t bit)
{
static const char * const hwcap_str[] = {
[__builtin_ctz(ARM_HWCAP2_A64_DCPODP )] = "dcpodp",
[__builtin_ctz(ARM_HWCAP2_A64_SVE2 )] = "sve2",
[__builtin_ctz(ARM_HWCAP2_A64_SVEAES )] = "sveaes",
[__builtin_ctz(ARM_HWCAP2_A64_SVEPMULL )] = "svepmull",
[__builtin_ctz(ARM_HWCAP2_A64_SVEBITPERM )] = "svebitperm",
[__builtin_ctz(ARM_HWCAP2_A64_SVESHA3 )] = "svesha3",
[__builtin_ctz(ARM_HWCAP2_A64_SVESM4 )] = "svesm4",
[__builtin_ctz(ARM_HWCAP2_A64_FLAGM2 )] = "flagm2",
[__builtin_ctz(ARM_HWCAP2_A64_FRINT )] = "frint",
[__builtin_ctz(ARM_HWCAP2_A64_SVEI8MM )] = "svei8mm",
[__builtin_ctz(ARM_HWCAP2_A64_SVEF32MM )] = "svef32mm",
[__builtin_ctz(ARM_HWCAP2_A64_SVEF64MM )] = "svef64mm",
[__builtin_ctz(ARM_HWCAP2_A64_SVEBF16 )] = "svebf16",
[__builtin_ctz(ARM_HWCAP2_A64_I8MM )] = "i8mm",
[__builtin_ctz(ARM_HWCAP2_A64_BF16 )] = "bf16",
[__builtin_ctz(ARM_HWCAP2_A64_DGH )] = "dgh",
[__builtin_ctz(ARM_HWCAP2_A64_RNG )] = "rng",
[__builtin_ctz(ARM_HWCAP2_A64_BTI )] = "bti",
[__builtin_ctz(ARM_HWCAP2_A64_MTE )] = "mte",
[__builtin_ctz(ARM_HWCAP2_A64_ECV )] = "ecv",
[__builtin_ctz(ARM_HWCAP2_A64_AFP )] = "afp",
[__builtin_ctz(ARM_HWCAP2_A64_RPRES )] = "rpres",
[__builtin_ctz(ARM_HWCAP2_A64_MTE3 )] = "mte3",
[__builtin_ctz(ARM_HWCAP2_A64_SME )] = "sme",
[__builtin_ctz(ARM_HWCAP2_A64_SME_I16I64 )] = "smei16i64",
[__builtin_ctz(ARM_HWCAP2_A64_SME_F64F64 )] = "smef64f64",
[__builtin_ctz(ARM_HWCAP2_A64_SME_I8I32 )] = "smei8i32",
[__builtin_ctz(ARM_HWCAP2_A64_SME_F16F32 )] = "smef16f32",
[__builtin_ctz(ARM_HWCAP2_A64_SME_B16F32 )] = "smeb16f32",
[__builtin_ctz(ARM_HWCAP2_A64_SME_F32F32 )] = "smef32f32",
[__builtin_ctz(ARM_HWCAP2_A64_SME_FA64 )] = "smefa64",
[__builtin_ctz(ARM_HWCAP2_A64_WFXT )] = "wfxt",
[__builtin_ctzll(ARM_HWCAP2_A64_EBF16 )] = "ebf16",
[__builtin_ctzll(ARM_HWCAP2_A64_SVE_EBF16 )] = "sveebf16",
[__builtin_ctzll(ARM_HWCAP2_A64_CSSC )] = "cssc",
[__builtin_ctzll(ARM_HWCAP2_A64_RPRFM )] = "rprfm",
[__builtin_ctzll(ARM_HWCAP2_A64_SVE2P1 )] = "sve2p1",
[__builtin_ctzll(ARM_HWCAP2_A64_SME2 )] = "sme2",
[__builtin_ctzll(ARM_HWCAP2_A64_SME2P1 )] = "sme2p1",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_I16I32 )] = "smei16i32",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_BI32I32)] = "smebi32i32",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_B16B16 )] = "smeb16b16",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_F16F16 )] = "smef16f16",
[__builtin_ctzll(ARM_HWCAP2_A64_MOPS )] = "mops",
[__builtin_ctzll(ARM_HWCAP2_A64_HBC )] = "hbc",
[__builtin_ctzll(ARM_HWCAP2_A64_SVE_B16B16 )] = "sveb16b16",
[__builtin_ctzll(ARM_HWCAP2_A64_LRCPC3 )] = "lrcpc3",
[__builtin_ctzll(ARM_HWCAP2_A64_LSE128 )] = "lse128",
[__builtin_ctzll(ARM_HWCAP2_A64_FPMR )] = "fpmr",
[__builtin_ctzll(ARM_HWCAP2_A64_LUT )] = "lut",
[__builtin_ctzll(ARM_HWCAP2_A64_FAMINMAX )] = "faminmax",
[__builtin_ctzll(ARM_HWCAP2_A64_F8CVT )] = "f8cvt",
[__builtin_ctzll(ARM_HWCAP2_A64_F8FMA )] = "f8fma",
[__builtin_ctzll(ARM_HWCAP2_A64_F8DP4 )] = "f8dp4",
[__builtin_ctzll(ARM_HWCAP2_A64_F8DP2 )] = "f8dp2",
[__builtin_ctzll(ARM_HWCAP2_A64_F8E4M3 )] = "f8e4m3",
[__builtin_ctzll(ARM_HWCAP2_A64_F8E5M2 )] = "f8e5m2",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_LUTV2 )] = "smelutv2",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_F8F16 )] = "smef8f16",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_F8F32 )] = "smef8f32",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_SF8DP4 )] = "smesf8dp4",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_SF8DP2 )] = "smesf8dp2",
[__builtin_ctzll(ARM_HWCAP2_A64_POE )] = "poe",
};
return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
}
const char *get_elf_platform(CPUState *cs)
{
return TARGET_BIG_ENDIAN ? "aarch64_be" : "aarch64";
}
bool arch_parse_elf_property(uint32_t pr_type, uint32_t pr_datasz,
const uint32_t *data,
struct image_info *info,
Error **errp)
{
if (pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND) {
if (pr_datasz != sizeof(uint32_t)) {
error_setg(errp, "Ill-formed GNU_PROPERTY_AARCH64_FEATURE_1_AND");
return false;
}
/* We will extract GNU_PROPERTY_AARCH64_FEATURE_1_BTI later. */
info->note_flags = *data;
}
return true;
}
void elf_core_copy_regs(target_elf_gregset_t *r, const CPUARMState *env)
{
for (int i = 0; i < 31; i++) {
r->pt.regs[i] = tswap64(env->xregs[i]);
}
r->pt.sp = tswap64(env->xregs[31]);
r->pt.pc = tswap64(env->pc);
r->pt.pstate = tswap64(pstate_read((CPUARMState *)env));
}
+38
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@@ -0,0 +1,38 @@
/*
* AArch64 gcs functions for linux-user
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef AARCH64_GCS_INTERNAL_H
#define AARCH64_GCS_INTERNAL_H
#ifndef PR_SHADOW_STACK_ENABLE
# define PR_SHADOW_STACK_ENABLE (1U << 0)
# define PR_SHADOW_STACK_WRITE (1U << 1)
# define PR_SHADOW_STACK_PUSH (1U << 2)
#endif
static inline uint64_t gcs_get_el0_mode(CPUArchState *env)
{
uint64_t cr = env->cp15.gcscr_el[0];
abi_ulong flags = 0;
flags |= cr & GCSCR_PCRSEL ? PR_SHADOW_STACK_ENABLE : 0;
flags |= cr & GCSCR_STREN ? PR_SHADOW_STACK_WRITE : 0;
flags |= cr & GCSCR_PUSHMEN ? PR_SHADOW_STACK_PUSH : 0;
return flags;
}
static inline void gcs_set_el0_mode(CPUArchState *env, uint64_t flags)
{
uint64_t cr = GCSCRE0_NTR;
cr |= flags & PR_SHADOW_STACK_ENABLE ? GCSCR_RVCHKEN | GCSCR_PCRSEL : 0;
cr |= flags & PR_SHADOW_STACK_WRITE ? GCSCR_STREN : 0;
cr |= flags & PR_SHADOW_STACK_PUSH ? GCSCR_PUSHMEN : 0;
env->cp15.gcscr_el[0] = cr;
}
#endif
+19
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@@ -0,0 +1,19 @@
# TARGET_BIG_ENDIAN is defined to 'n' for little-endian; which means it
# is always true as far as source_set.apply() is concerned. Always build
# both header files and include the right one via #if.
vdso_be_inc = gen_vdso.process('vdso-be.so',
extra_args: ['-r', '__kernel_rt_sigreturn'])
vdso_le_inc = gen_vdso.process('vdso-le.so',
extra_args: ['-r', '__kernel_rt_sigreturn'])
linux_user_ss.add(when: 'TARGET_AARCH64', if_true: [vdso_be_inc, vdso_le_inc])
linux_user_ss.add(when: 'TARGET_AARCH64', if_true: [files('mte_user_helper.c')])
syscall_nr_generators += {
'aarch64': generator(sh,
arguments: [ meson.current_source_dir() / 'syscallhdr.sh', '@INPUT@', '@OUTPUT@', '@EXTRA_ARGS@' ],
output: '@BASENAME@_nr.h')
}
+44
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@@ -0,0 +1,44 @@
/*
* ARM MemTag convenience functions.
*
* This code is licensed under the GNU GPL v2 or later.
*
* SPDX-License-Identifier: LGPL-2.1-or-later
*/
#include "qemu/osdep.h"
#include "qemu.h"
#include "mte_user_helper.h"
void arm_set_tagged_addr_ctrl(CPUArchState *env, abi_long value)
{
/*
* Write PR_MTE_TCF to SCTLR_EL1[TCF0].
*
* The kernel has a per-cpu configuration for the sysadmin,
* /sys/devices/system/cpu/cpu<N>/mte_tcf_preferred,
* which qemu does not implement.
*
* Because there is no performance difference between the modes, and
* because SYNC is most useful for debugging MTE errors, choose SYNC
* as the preferred mode. With this preference, and the way the API
* uses only two bits, there is no way for the program to select
* ASYMM mode.
*/
unsigned tcf = 0;
if (value & PR_MTE_TCF_SYNC) {
tcf = 1;
} else if (value & PR_MTE_TCF_ASYNC) {
tcf = 2;
}
env->cp15.sctlr_el[1] = deposit64(env->cp15.sctlr_el[1], 38, 2, tcf);
/*
* If MTE_STORE_ONLY is enabled, set the corresponding sctlr_el1 bit
*/
if (value & PR_MTE_STORE_ONLY) {
env->cp15.sctlr_el[1] |= SCTLR_TCSO0;
} else {
env->cp15.sctlr_el[1] &= ~SCTLR_TCSO0;
}
}
+38
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@@ -0,0 +1,38 @@
/*
* ARM MemTag convenience functions.
*
* This code is licensed under the GNU GPL v2 or later.
*
* SPDX-License-Identifier: LGPL-2.1-or-later
*/
#ifndef AARCH64_MTE_USER_HELPER_H
#define AARCH64_MTE USER_HELPER_H
#include "user/abitypes.h"
#ifndef PR_MTE_TCF_SHIFT
# define PR_MTE_TCF_SHIFT 1
# define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT)
# define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT)
# define PR_MTE_TCF_ASYNC (2UL << PR_MTE_TCF_SHIFT)
# define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT)
# define PR_MTE_TAG_SHIFT 3
# define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT)
#endif
#ifndef PR_MTE_STORE_ONLY
# define PR_MTE_STORE_ONLY (1UL << 19)
#endif
/**
* arm_set_tagged_addr_ctrl - Set TCF0 and TCSO0 fields in SCTLR_EL1 register
* @env: The CPU environment
* @value: The value to be set for the Tag Check Fault and Tag Check Store Only
* in EL0 field.
*
* Only SYNC and ASYNC modes can be selected for TCF0. If ASYMM mode is given,
* the SYNC mode is selected instead. So, there is no way to set the ASYMM mode.
*/
void arm_set_tagged_addr_ctrl(CPUArchState *env, abi_long value);
#endif /* AARCH64_MTE_USER_HELPER_H */
File diff suppressed because it is too large Load Diff
+1
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@@ -0,0 +1 @@
#include "../generic/sockbits.h"
+405
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@@ -0,0 +1,405 @@
# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
#
# This file contains the system call numbers for all of the
# more recently added architectures.
#
# As a basic principle, no duplication of functionality
# should be added, e.g. we don't use lseek when llseek
# is present. New architectures should use this file
# and implement the less feature-full calls in user space.
#
0 common io_setup sys_io_setup compat_sys_io_setup
1 common io_destroy sys_io_destroy
2 common io_submit sys_io_submit compat_sys_io_submit
3 common io_cancel sys_io_cancel
4 time32 io_getevents sys_io_getevents_time32
4 64 io_getevents sys_io_getevents
5 common setxattr sys_setxattr
6 common lsetxattr sys_lsetxattr
7 common fsetxattr sys_fsetxattr
8 common getxattr sys_getxattr
9 common lgetxattr sys_lgetxattr
10 common fgetxattr sys_fgetxattr
11 common listxattr sys_listxattr
12 common llistxattr sys_llistxattr
13 common flistxattr sys_flistxattr
14 common removexattr sys_removexattr
15 common lremovexattr sys_lremovexattr
16 common fremovexattr sys_fremovexattr
17 common getcwd sys_getcwd
18 common lookup_dcookie sys_ni_syscall
19 common eventfd2 sys_eventfd2
20 common epoll_create1 sys_epoll_create1
21 common epoll_ctl sys_epoll_ctl
22 common epoll_pwait sys_epoll_pwait compat_sys_epoll_pwait
23 common dup sys_dup
24 common dup3 sys_dup3
25 32 fcntl64 sys_fcntl64 compat_sys_fcntl64
25 64 fcntl sys_fcntl
26 common inotify_init1 sys_inotify_init1
27 common inotify_add_watch sys_inotify_add_watch
28 common inotify_rm_watch sys_inotify_rm_watch
29 common ioctl sys_ioctl compat_sys_ioctl
30 common ioprio_set sys_ioprio_set
31 common ioprio_get sys_ioprio_get
32 common flock sys_flock
33 common mknodat sys_mknodat
34 common mkdirat sys_mkdirat
35 common unlinkat sys_unlinkat
36 common symlinkat sys_symlinkat
37 common linkat sys_linkat
# renameat is superseded with flags by renameat2
38 renameat renameat sys_renameat
39 common umount2 sys_umount
40 common mount sys_mount
41 common pivot_root sys_pivot_root
42 common nfsservctl sys_ni_syscall
43 32 statfs64 sys_statfs64 compat_sys_statfs64
43 64 statfs sys_statfs
44 32 fstatfs64 sys_fstatfs64 compat_sys_fstatfs64
44 64 fstatfs sys_fstatfs
45 32 truncate64 sys_truncate64 compat_sys_truncate64
45 64 truncate sys_truncate
46 32 ftruncate64 sys_ftruncate64 compat_sys_ftruncate64
46 64 ftruncate sys_ftruncate
47 common fallocate sys_fallocate compat_sys_fallocate
48 common faccessat sys_faccessat
49 common chdir sys_chdir
50 common fchdir sys_fchdir
51 common chroot sys_chroot
52 common fchmod sys_fchmod
53 common fchmodat sys_fchmodat
54 common fchownat sys_fchownat
55 common fchown sys_fchown
56 common openat sys_openat
57 common close sys_close
58 common vhangup sys_vhangup
59 common pipe2 sys_pipe2
60 common quotactl sys_quotactl
61 common getdents64 sys_getdents64
62 32 llseek sys_llseek
62 64 lseek sys_lseek
63 common read sys_read
64 common write sys_write
65 common readv sys_readv sys_readv
66 common writev sys_writev sys_writev
67 common pread64 sys_pread64 compat_sys_pread64
68 common pwrite64 sys_pwrite64 compat_sys_pwrite64
69 common preadv sys_preadv compat_sys_preadv
70 common pwritev sys_pwritev compat_sys_pwritev
71 32 sendfile64 sys_sendfile64
71 64 sendfile sys_sendfile64
72 time32 pselect6 sys_pselect6_time32 compat_sys_pselect6_time32
72 64 pselect6 sys_pselect6
73 time32 ppoll sys_ppoll_time32 compat_sys_ppoll_time32
73 64 ppoll sys_ppoll
74 common signalfd4 sys_signalfd4 compat_sys_signalfd4
75 common vmsplice sys_vmsplice
76 common splice sys_splice
77 common tee sys_tee
78 common readlinkat sys_readlinkat
79 stat64 fstatat64 sys_fstatat64
79 64 newfstatat sys_newfstatat
80 stat64 fstat64 sys_fstat64
80 64 fstat sys_newfstat
81 common sync sys_sync
82 common fsync sys_fsync
83 common fdatasync sys_fdatasync
84 common sync_file_range sys_sync_file_range compat_sys_sync_file_range
85 common timerfd_create sys_timerfd_create
86 time32 timerfd_settime sys_timerfd_settime32
86 64 timerfd_settime sys_timerfd_settime
87 time32 timerfd_gettime sys_timerfd_gettime32
87 64 timerfd_gettime sys_timerfd_gettime
88 time32 utimensat sys_utimensat_time32
88 64 utimensat sys_utimensat
89 common acct sys_acct
90 common capget sys_capget
91 common capset sys_capset
92 common personality sys_personality
93 common exit sys_exit
94 common exit_group sys_exit_group
95 common waitid sys_waitid compat_sys_waitid
96 common set_tid_address sys_set_tid_address
97 common unshare sys_unshare
98 time32 futex sys_futex_time32
98 64 futex sys_futex
99 common set_robust_list sys_set_robust_list compat_sys_set_robust_list
100 common get_robust_list sys_get_robust_list compat_sys_get_robust_list
101 time32 nanosleep sys_nanosleep_time32
101 64 nanosleep sys_nanosleep
102 common getitimer sys_getitimer compat_sys_getitimer
103 common setitimer sys_setitimer compat_sys_setitimer
104 common kexec_load sys_kexec_load compat_sys_kexec_load
105 common init_module sys_init_module
106 common delete_module sys_delete_module
107 common timer_create sys_timer_create compat_sys_timer_create
108 time32 timer_gettime sys_timer_gettime32
108 64 timer_gettime sys_timer_gettime
109 common timer_getoverrun sys_timer_getoverrun
110 time32 timer_settime sys_timer_settime32
110 64 timer_settime sys_timer_settime
111 common timer_delete sys_timer_delete
112 time32 clock_settime sys_clock_settime32
112 64 clock_settime sys_clock_settime
113 time32 clock_gettime sys_clock_gettime32
113 64 clock_gettime sys_clock_gettime
114 time32 clock_getres sys_clock_getres_time32
114 64 clock_getres sys_clock_getres
115 time32 clock_nanosleep sys_clock_nanosleep_time32
115 64 clock_nanosleep sys_clock_nanosleep
116 common syslog sys_syslog
117 common ptrace sys_ptrace compat_sys_ptrace
118 common sched_setparam sys_sched_setparam
119 common sched_setscheduler sys_sched_setscheduler
120 common sched_getscheduler sys_sched_getscheduler
121 common sched_getparam sys_sched_getparam
122 common sched_setaffinity sys_sched_setaffinity compat_sys_sched_setaffinity
123 common sched_getaffinity sys_sched_getaffinity compat_sys_sched_getaffinity
124 common sched_yield sys_sched_yield
125 common sched_get_priority_max sys_sched_get_priority_max
126 common sched_get_priority_min sys_sched_get_priority_min
127 time32 sched_rr_get_interval sys_sched_rr_get_interval_time32
127 64 sched_rr_get_interval sys_sched_rr_get_interval
128 common restart_syscall sys_restart_syscall
129 common kill sys_kill
130 common tkill sys_tkill
131 common tgkill sys_tgkill
132 common sigaltstack sys_sigaltstack compat_sys_sigaltstack
133 common rt_sigsuspend sys_rt_sigsuspend compat_sys_rt_sigsuspend
134 common rt_sigaction sys_rt_sigaction compat_sys_rt_sigaction
135 common rt_sigprocmask sys_rt_sigprocmask compat_sys_rt_sigprocmask
136 common rt_sigpending sys_rt_sigpending compat_sys_rt_sigpending
137 time32 rt_sigtimedwait sys_rt_sigtimedwait_time32 compat_sys_rt_sigtimedwait_time32
137 64 rt_sigtimedwait sys_rt_sigtimedwait
138 common rt_sigqueueinfo sys_rt_sigqueueinfo compat_sys_rt_sigqueueinfo
139 common rt_sigreturn sys_rt_sigreturn compat_sys_rt_sigreturn
140 common setpriority sys_setpriority
141 common getpriority sys_getpriority
142 common reboot sys_reboot
143 common setregid sys_setregid
144 common setgid sys_setgid
145 common setreuid sys_setreuid
146 common setuid sys_setuid
147 common setresuid sys_setresuid
148 common getresuid sys_getresuid
149 common setresgid sys_setresgid
150 common getresgid sys_getresgid
151 common setfsuid sys_setfsuid
152 common setfsgid sys_setfsgid
153 common times sys_times compat_sys_times
154 common setpgid sys_setpgid
155 common getpgid sys_getpgid
156 common getsid sys_getsid
157 common setsid sys_setsid
158 common getgroups sys_getgroups
159 common setgroups sys_setgroups
160 common uname sys_newuname
161 common sethostname sys_sethostname
162 common setdomainname sys_setdomainname
# getrlimit and setrlimit are superseded with prlimit64
163 rlimit getrlimit sys_getrlimit compat_sys_getrlimit
164 rlimit setrlimit sys_setrlimit compat_sys_setrlimit
165 common getrusage sys_getrusage compat_sys_getrusage
166 common umask sys_umask
167 common prctl sys_prctl
168 common getcpu sys_getcpu
169 time32 gettimeofday sys_gettimeofday compat_sys_gettimeofday
169 64 gettimeofday sys_gettimeofday
170 time32 settimeofday sys_settimeofday compat_sys_settimeofday
170 64 settimeofday sys_settimeofday
171 time32 adjtimex sys_adjtimex_time32
171 64 adjtimex sys_adjtimex
172 common getpid sys_getpid
173 common getppid sys_getppid
174 common getuid sys_getuid
175 common geteuid sys_geteuid
176 common getgid sys_getgid
177 common getegid sys_getegid
178 common gettid sys_gettid
179 common sysinfo sys_sysinfo compat_sys_sysinfo
180 common mq_open sys_mq_open compat_sys_mq_open
181 common mq_unlink sys_mq_unlink
182 time32 mq_timedsend sys_mq_timedsend_time32
182 64 mq_timedsend sys_mq_timedsend
183 time32 mq_timedreceive sys_mq_timedreceive_time32
183 64 mq_timedreceive sys_mq_timedreceive
184 common mq_notify sys_mq_notify compat_sys_mq_notify
185 common mq_getsetattr sys_mq_getsetattr compat_sys_mq_getsetattr
186 common msgget sys_msgget
187 common msgctl sys_msgctl compat_sys_msgctl
188 common msgrcv sys_msgrcv compat_sys_msgrcv
189 common msgsnd sys_msgsnd compat_sys_msgsnd
190 common semget sys_semget
191 common semctl sys_semctl compat_sys_semctl
192 time32 semtimedop sys_semtimedop_time32
192 64 semtimedop sys_semtimedop
193 common semop sys_semop
194 common shmget sys_shmget
195 common shmctl sys_shmctl compat_sys_shmctl
196 common shmat sys_shmat compat_sys_shmat
197 common shmdt sys_shmdt
198 common socket sys_socket
199 common socketpair sys_socketpair
200 common bind sys_bind
201 common listen sys_listen
202 common accept sys_accept
203 common connect sys_connect
204 common getsockname sys_getsockname
205 common getpeername sys_getpeername
206 common sendto sys_sendto
207 common recvfrom sys_recvfrom compat_sys_recvfrom
208 common setsockopt sys_setsockopt sys_setsockopt
209 common getsockopt sys_getsockopt sys_getsockopt
210 common shutdown sys_shutdown
211 common sendmsg sys_sendmsg compat_sys_sendmsg
212 common recvmsg sys_recvmsg compat_sys_recvmsg
213 common readahead sys_readahead compat_sys_readahead
214 common brk sys_brk
215 common munmap sys_munmap
216 common mremap sys_mremap
217 common add_key sys_add_key
218 common request_key sys_request_key
219 common keyctl sys_keyctl compat_sys_keyctl
220 common clone sys_clone
221 common execve sys_execve compat_sys_execve
222 32 mmap2 sys_mmap2
222 64 mmap sys_mmap
223 32 fadvise64_64 sys_fadvise64_64 compat_sys_fadvise64_64
223 64 fadvise64 sys_fadvise64_64
224 common swapon sys_swapon
225 common swapoff sys_swapoff
226 common mprotect sys_mprotect
227 common msync sys_msync
228 common mlock sys_mlock
229 common munlock sys_munlock
230 common mlockall sys_mlockall
231 common munlockall sys_munlockall
232 common mincore sys_mincore
233 common madvise sys_madvise
234 common remap_file_pages sys_remap_file_pages
235 common mbind sys_mbind
236 common get_mempolicy sys_get_mempolicy
237 common set_mempolicy sys_set_mempolicy
238 common migrate_pages sys_migrate_pages
239 common move_pages sys_move_pages
240 common rt_tgsigqueueinfo sys_rt_tgsigqueueinfo compat_sys_rt_tgsigqueueinfo
241 common perf_event_open sys_perf_event_open
242 common accept4 sys_accept4
243 time32 recvmmsg sys_recvmmsg_time32 compat_sys_recvmmsg_time32
243 64 recvmmsg sys_recvmmsg
# Architectures may provide up to 16 syscalls of their own between 244 and 259
244 arc cacheflush sys_cacheflush
245 arc arc_settls sys_arc_settls
246 arc arc_gettls sys_arc_gettls
247 arc sysfs sys_sysfs
248 arc arc_usr_cmpxchg sys_arc_usr_cmpxchg
244 csky set_thread_area sys_set_thread_area
245 csky cacheflush sys_cacheflush
244 nios2 cacheflush sys_cacheflush
244 or1k or1k_atomic sys_or1k_atomic
258 riscv riscv_hwprobe sys_riscv_hwprobe
259 riscv riscv_flush_icache sys_riscv_flush_icache
260 time32 wait4 sys_wait4 compat_sys_wait4
260 64 wait4 sys_wait4
261 common prlimit64 sys_prlimit64
262 common fanotify_init sys_fanotify_init
263 common fanotify_mark sys_fanotify_mark
264 common name_to_handle_at sys_name_to_handle_at
265 common open_by_handle_at sys_open_by_handle_at
266 time32 clock_adjtime sys_clock_adjtime32
266 64 clock_adjtime sys_clock_adjtime
267 common syncfs sys_syncfs
268 common setns sys_setns
269 common sendmmsg sys_sendmmsg compat_sys_sendmmsg
270 common process_vm_readv sys_process_vm_readv
271 common process_vm_writev sys_process_vm_writev
272 common kcmp sys_kcmp
273 common finit_module sys_finit_module
274 common sched_setattr sys_sched_setattr
275 common sched_getattr sys_sched_getattr
276 common renameat2 sys_renameat2
277 common seccomp sys_seccomp
278 common getrandom sys_getrandom
279 common memfd_create sys_memfd_create
280 common bpf sys_bpf
281 common execveat sys_execveat compat_sys_execveat
282 common userfaultfd sys_userfaultfd
283 common membarrier sys_membarrier
284 common mlock2 sys_mlock2
285 common copy_file_range sys_copy_file_range
286 common preadv2 sys_preadv2 compat_sys_preadv2
287 common pwritev2 sys_pwritev2 compat_sys_pwritev2
288 common pkey_mprotect sys_pkey_mprotect
289 common pkey_alloc sys_pkey_alloc
290 common pkey_free sys_pkey_free
291 common statx sys_statx
292 time32 io_pgetevents sys_io_pgetevents_time32 compat_sys_io_pgetevents
292 64 io_pgetevents sys_io_pgetevents
293 common rseq sys_rseq
294 common kexec_file_load sys_kexec_file_load
# 295 through 402 are unassigned to sync up with generic numbers don't use
403 32 clock_gettime64 sys_clock_gettime
404 32 clock_settime64 sys_clock_settime
405 32 clock_adjtime64 sys_clock_adjtime
406 32 clock_getres_time64 sys_clock_getres
407 32 clock_nanosleep_time64 sys_clock_nanosleep
408 32 timer_gettime64 sys_timer_gettime
409 32 timer_settime64 sys_timer_settime
410 32 timerfd_gettime64 sys_timerfd_gettime
411 32 timerfd_settime64 sys_timerfd_settime
412 32 utimensat_time64 sys_utimensat
413 32 pselect6_time64 sys_pselect6 compat_sys_pselect6_time64
414 32 ppoll_time64 sys_ppoll compat_sys_ppoll_time64
416 32 io_pgetevents_time64 sys_io_pgetevents compat_sys_io_pgetevents_time64
417 32 recvmmsg_time64 sys_recvmmsg compat_sys_recvmmsg_time64
418 32 mq_timedsend_time64 sys_mq_timedsend
419 32 mq_timedreceive_time64 sys_mq_timedreceive
420 32 semtimedop_time64 sys_semtimedop
421 32 rt_sigtimedwait_time64 sys_rt_sigtimedwait compat_sys_rt_sigtimedwait_time64
422 32 futex_time64 sys_futex
423 32 sched_rr_get_interval_time64 sys_sched_rr_get_interval
424 common pidfd_send_signal sys_pidfd_send_signal
425 common io_uring_setup sys_io_uring_setup
426 common io_uring_enter sys_io_uring_enter
427 common io_uring_register sys_io_uring_register
428 common open_tree sys_open_tree
429 common move_mount sys_move_mount
430 common fsopen sys_fsopen
431 common fsconfig sys_fsconfig
432 common fsmount sys_fsmount
433 common fspick sys_fspick
434 common pidfd_open sys_pidfd_open
435 common clone3 sys_clone3
436 common close_range sys_close_range
437 common openat2 sys_openat2
438 common pidfd_getfd sys_pidfd_getfd
439 common faccessat2 sys_faccessat2
440 common process_madvise sys_process_madvise
441 common epoll_pwait2 sys_epoll_pwait2 compat_sys_epoll_pwait2
442 common mount_setattr sys_mount_setattr
443 common quotactl_fd sys_quotactl_fd
444 common landlock_create_ruleset sys_landlock_create_ruleset
445 common landlock_add_rule sys_landlock_add_rule
446 common landlock_restrict_self sys_landlock_restrict_self
447 memfd_secret memfd_secret sys_memfd_secret
448 common process_mrelease sys_process_mrelease
449 common futex_waitv sys_futex_waitv
450 common set_mempolicy_home_node sys_set_mempolicy_home_node
451 common cachestat sys_cachestat
452 common fchmodat2 sys_fchmodat2
453 common map_shadow_stack sys_map_shadow_stack
454 common futex_wake sys_futex_wake
455 common futex_wait sys_futex_wait
456 common futex_requeue sys_futex_requeue
457 common statmount sys_statmount
458 common listmount sys_listmount
459 common lsm_get_self_attr sys_lsm_get_self_attr
460 common lsm_set_self_attr sys_lsm_set_self_attr
461 common lsm_list_modules sys_lsm_list_modules
462 common mseal sys_mseal
+1
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@@ -0,0 +1 @@
#include "syscall_64_nr.h"
+28
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@@ -0,0 +1,28 @@
#!/bin/sh
# SPDX-License-Identifier: GPL-2.0
in="$1"
out="$2"
my_abis=`echo "($3)" | tr ',' '|'`
prefix="$4"
offset="$5"
fileguard=LINUX_USER_AARCH64_`basename "$out" | sed \
-e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/' \
-e 's/[^A-Z0-9_]/_/g' -e 's/__/_/g'`
grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
echo "#ifndef ${fileguard}"
echo "#define ${fileguard} 1"
echo ""
while read nr abi name entry compat; do
if [ -z "$offset" ]; then
echo "#define TARGET_NR_${prefix}${name} $nr"
else
echo "#define TARGET_NR_${prefix}${name} ($offset + $nr)"
fi
done
echo ""
echo "#endif /* ${fileguard} */"
) > "$out"
+50
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@@ -0,0 +1,50 @@
/*
* ARM AArch64 specific CPU ABI and functions for linux-user
*
* Copyright (c) 2013 Alexander Graf <[email protected]>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef AARCH64_TARGET_CPU_H
#define AARCH64_TARGET_CPU_H
static inline void cpu_clone_regs_child(CPUARMState *env, target_ulong newsp,
unsigned flags)
{
if (newsp) {
env->xregs[31] = newsp;
}
env->xregs[0] = 0;
}
static inline void cpu_clone_regs_parent(CPUARMState *env, unsigned flags)
{
}
static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls)
{
/*
* Note that AArch64 Linux keeps the TLS pointer in TPIDR; this is
* different from AArch32 Linux, which uses TPIDRRO.
*/
env->cp15.tpidr_el[0] = newtls;
/* TPIDR2_EL0 is cleared with CLONE_SETTLS. */
env->cp15.tpidr2_el0 = 0;
}
static inline abi_ulong get_sp_from_cpustate(CPUARMState *state)
{
return state->xregs[31];
}
#endif
+36
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@@ -0,0 +1,36 @@
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation, or (at your option) any
* later version. See the COPYING file in the top-level directory.
*/
#ifndef AARCH64_TARGET_ELF_H
#define AARCH64_TARGET_ELF_H
#include "target_ptrace.h"
#define ELF_MACHINE EM_AARCH64
#define ELF_CLASS ELFCLASS64
#define HAVE_ELF_HWCAP 1
#define HAVE_ELF_HWCAP2 1
#define HAVE_ELF_PLATFORM 1
#define HAVE_ELF_CORE_DUMP 1
#define HAVE_ELF_GNU_PROPERTY 1
/*
* See linux kernel: arch/arm64/include/asm/elf.h, where
* elf_gregset_t is mapped to struct user_pt_regs via sizeof.
*/
typedef struct target_elf_gregset_t {
struct target_user_pt_regs pt;
} target_elf_gregset_t;
#if TARGET_BIG_ENDIAN
# define VDSO_HEADER "vdso-be.c.inc"
#else
# define VDSO_HEADER "vdso-le.c.inc"
#endif
#endif
+7
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@@ -0,0 +1,7 @@
#ifndef AARCH64_TARGET_ERRNO_DEFS_H
#define AARCH64_TARGET_ERRNO_DEFS_H
/* Target uses generic errno */
#include "../generic/target_errno_defs.h"
#endif
+17
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@@ -0,0 +1,17 @@
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation, or (at your option) any
* later version. See the COPYING file in the top-level directory.
*/
#ifndef AARCH64_TARGET_FCNTL_H
#define AARCH64_TARGET_FCNTL_H
#define TARGET_O_DIRECTORY 040000 /* must be a directory */
#define TARGET_O_NOFOLLOW 0100000 /* don't follow links */
#define TARGET_O_DIRECT 0200000 /* direct disk access hint */
#define TARGET_O_LARGEFILE 0400000
#include "../generic/fcntl.h"
#endif
+1
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@@ -0,0 +1 @@
#include "../generic/target_flat.h"
+22
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@@ -0,0 +1,22 @@
#ifndef AARCH64_TARGET_MMAN_H
#define AARCH64_TARGET_MMAN_H
#define TARGET_PROT_BTI 0x10
#define TARGET_PROT_MTE 0x20
/*
* arch/arm64/include/asm/processor.h:
*
* TASK_UNMAPPED_BASE DEFAULT_MAP_WINDOW / 4
* DEFAULT_MAP_WINDOW DEFAULT_MAP_WINDOW_64
* DEFAULT_MAP_WINDOW_64 UL(1) << VA_BITS_MIN
* VA_BITS_MIN 48 (unless explicitly configured smaller)
*/
#define TASK_UNMAPPED_BASE (1ull << (48 - 2))
/* arch/arm64/include/asm/elf.h */
#define ELF_ET_DYN_BASE TARGET_PAGE_ALIGN((1ull << 48) / 3 * 2)
#include "../generic/target_mman.h"
#endif
+309
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@@ -0,0 +1,309 @@
/*
* AArch64 specific prctl functions for linux-user
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef AARCH64_TARGET_PRCTL_H
#define AARCH64_TARGET_PRCTL_H
#include "qemu/units.h"
#include "target/arm/cpu-features.h"
#include "mte_user_helper.h"
#include "gcs-internal.h"
static abi_long do_prctl_sve_get_vl(CPUArchState *env)
{
ARMCPU *cpu = env_archcpu(env);
if (cpu_isar_feature(aa64_sve, cpu)) {
/* PSTATE.SM is always unset on syscall entry. */
return sve_vq(env) * 16;
}
return -TARGET_EINVAL;
}
#define do_prctl_sve_get_vl do_prctl_sve_get_vl
static abi_long do_prctl_sve_set_vl(CPUArchState *env, abi_long arg2)
{
/*
* We cannot support either PR_SVE_SET_VL_ONEXEC or PR_SVE_VL_INHERIT.
* Note the kernel definition of sve_vl_valid allows for VQ=512,
* i.e. VL=8192, even though the current architectural maximum is VQ=16.
*/
if (cpu_isar_feature(aa64_sve, env_archcpu(env))
&& arg2 >= 0 && arg2 <= 512 * 16 && !(arg2 & 15)) {
uint32_t vq, old_vq;
/* PSTATE.SM is always unset on syscall entry. */
old_vq = sve_vq(env);
/*
* Bound the value of arg2, so that we know that it fits into
* the 4-bit field in ZCR_EL1. Rely on the hflags rebuild to
* sort out the length supported by the cpu.
*/
vq = MAX(arg2 / 16, 1);
vq = MIN(vq, ARM_MAX_VQ);
env->vfp.zcr_el[1] = vq - 1;
arm_rebuild_hflags(env);
vq = sve_vq(env);
if (vq < old_vq) {
aarch64_sve_narrow_vq(env, vq);
}
return vq * 16;
}
return -TARGET_EINVAL;
}
#define do_prctl_sve_set_vl do_prctl_sve_set_vl
static abi_long do_prctl_sme_get_vl(CPUArchState *env)
{
ARMCPU *cpu = env_archcpu(env);
if (cpu_isar_feature(aa64_sme, cpu)) {
return sme_vq(env) * 16;
}
return -TARGET_EINVAL;
}
#define do_prctl_sme_get_vl do_prctl_sme_get_vl
static abi_long do_prctl_sme_set_vl(CPUArchState *env, abi_long arg2)
{
/*
* We cannot support either PR_SME_SET_VL_ONEXEC or PR_SME_VL_INHERIT.
* Note the kernel definition of sve_vl_valid allows for VQ=512,
* i.e. VL=8192, even though the architectural maximum is VQ=16.
*/
if (cpu_isar_feature(aa64_sme, env_archcpu(env))
&& arg2 >= 0 && arg2 <= 512 * 16 && !(arg2 & 15)) {
int vq, old_vq;
old_vq = sme_vq(env);
/*
* Bound the value of vq, so that we know that it fits into
* the 4-bit field in SMCR_EL1. Because PSTATE.SM is cleared
* on syscall entry, we are not modifying the current SVE
* vector length.
*/
vq = MAX(arg2 / 16, 1);
vq = MIN(vq, 16);
env->vfp.smcr_el[1] =
FIELD_DP64(env->vfp.smcr_el[1], SMCR, LEN, vq - 1);
/* Delay rebuilding hflags until we know if ZA must change. */
vq = sve_vqm1_for_el_sm(env, 0, true) + 1;
if (vq != old_vq) {
/*
* PSTATE.ZA state is cleared on any change to SVL.
* We need not call arm_rebuild_hflags because PSTATE.SM was
* cleared on syscall entry, so this hasn't changed VL.
*/
env->svcr = FIELD_DP64(env->svcr, SVCR, ZA, 0);
arm_rebuild_hflags(env);
}
return vq * 16;
}
return -TARGET_EINVAL;
}
#define do_prctl_sme_set_vl do_prctl_sme_set_vl
static abi_long do_prctl_reset_keys(CPUArchState *env, abi_long arg2)
{
ARMCPU *cpu = env_archcpu(env);
if (cpu_isar_feature(aa64_pauth, cpu)) {
int all = (PR_PAC_APIAKEY | PR_PAC_APIBKEY |
PR_PAC_APDAKEY | PR_PAC_APDBKEY | PR_PAC_APGAKEY);
int ret = 0;
Error *err = NULL;
if (arg2 == 0) {
arg2 = all;
} else if (arg2 & ~all) {
return -TARGET_EINVAL;
}
if (arg2 & PR_PAC_APIAKEY) {
ret |= qemu_guest_getrandom(&env->keys.apia,
sizeof(ARMPACKey), &err);
}
if (arg2 & PR_PAC_APIBKEY) {
ret |= qemu_guest_getrandom(&env->keys.apib,
sizeof(ARMPACKey), &err);
}
if (arg2 & PR_PAC_APDAKEY) {
ret |= qemu_guest_getrandom(&env->keys.apda,
sizeof(ARMPACKey), &err);
}
if (arg2 & PR_PAC_APDBKEY) {
ret |= qemu_guest_getrandom(&env->keys.apdb,
sizeof(ARMPACKey), &err);
}
if (arg2 & PR_PAC_APGAKEY) {
ret |= qemu_guest_getrandom(&env->keys.apga,
sizeof(ARMPACKey), &err);
}
if (ret != 0) {
/*
* Some unknown failure in the crypto. The best
* we can do is log it and fail the syscall.
* The real syscall cannot fail this way.
*/
qemu_log_mask(LOG_UNIMP, "PR_PAC_RESET_KEYS: Crypto failure: %s",
error_get_pretty(err));
error_free(err);
return -TARGET_EIO;
}
return 0;
}
return -TARGET_EINVAL;
}
#define do_prctl_reset_keys do_prctl_reset_keys
static abi_long do_prctl_set_tagged_addr_ctrl(CPUArchState *env, abi_long arg2)
{
abi_ulong valid_mask = PR_TAGGED_ADDR_ENABLE;
ARMCPU *cpu = env_archcpu(env);
if (cpu_isar_feature(aa64_mte, cpu)) {
valid_mask |= PR_MTE_TCF_MASK;
valid_mask |= PR_MTE_TAG_MASK;
if (cpu_isar_feature(aa64_mte_store_only, cpu)) {
valid_mask |= PR_MTE_STORE_ONLY;
}
}
if (arg2 & ~valid_mask) {
return -TARGET_EINVAL;
}
env->tagged_addr_enable = arg2 & PR_TAGGED_ADDR_ENABLE;
if (cpu_isar_feature(aa64_mte, cpu)) {
arm_set_tagged_addr_ctrl(env, arg2);
/*
* Write PR_MTE_TAG to GCR_EL1[Exclude].
* Note that the syscall uses an include mask,
* and hardware uses an exclude mask -- invert.
*/
env->cp15.gcr_el1 =
deposit64(env->cp15.gcr_el1, 0, 16, ~arg2 >> PR_MTE_TAG_SHIFT);
arm_rebuild_hflags(env);
}
return 0;
}
#define do_prctl_set_tagged_addr_ctrl do_prctl_set_tagged_addr_ctrl
static abi_long do_prctl_get_tagged_addr_ctrl(CPUArchState *env)
{
ARMCPU *cpu = env_archcpu(env);
abi_long ret = 0;
if (env->tagged_addr_enable) {
ret |= PR_TAGGED_ADDR_ENABLE;
}
if (cpu_isar_feature(aa64_mte, cpu)) {
/* See do_prctl_set_tagged_addr_ctrl. */
ret |= extract64(env->cp15.sctlr_el[1], 38, 2) << PR_MTE_TCF_SHIFT;
ret = deposit64(ret, PR_MTE_TAG_SHIFT, 16, ~env->cp15.gcr_el1);
}
return ret;
}
#define do_prctl_get_tagged_addr_ctrl do_prctl_get_tagged_addr_ctrl
static abi_long do_prctl_get_shadow_stack_status(CPUArchState *env,
abi_long arg2)
{
ARMCPU *cpu = env_archcpu(env);
if (!cpu_isar_feature(aa64_gcs, cpu)) {
return -TARGET_EINVAL;
}
return put_user_ual(gcs_get_el0_mode(env), arg2);
}
#define do_prctl_get_shadow_stack_status do_prctl_get_shadow_stack_status
static abi_long gcs_alloc(abi_ulong hint, abi_ulong size)
{
/*
* Without softmmu, we cannot protect GCS memory properly.
* Make do with normal read/write permissions. This at least allows
* emulation of correct programs which don't access the gcs stack
* with normal instructions.
*/
return target_mmap(hint, size, PROT_READ | PROT_WRITE,
MAP_PRIVATE | MAP_ANONYMOUS |
(hint ? MAP_FIXED_NOREPLACE : 0), -1, 0);
}
static abi_ulong gcs_new_stack(TaskState *ts)
{
/* Use guest_stack_size as a proxy for RLIMIT_STACK. */
abi_ulong size = MIN(MAX(guest_stack_size / 2, TARGET_PAGE_SIZE), 2 * GiB);
abi_ulong base = gcs_alloc(0, size);
if (base == -1) {
return -1;
}
ts->gcs_base = base;
ts->gcs_size = size;
return base + size - 8;
}
static abi_long do_prctl_set_shadow_stack_status(CPUArchState *env,
abi_long new_mode)
{
ARMCPU *cpu = env_archcpu(env);
TaskState *ts = get_task_state(env_cpu(env));
abi_long cur_mode;
if (!cpu_isar_feature(aa64_gcs, cpu)) {
return -TARGET_EINVAL;
}
if (new_mode & ~(PR_SHADOW_STACK_ENABLE |
PR_SHADOW_STACK_WRITE |
PR_SHADOW_STACK_PUSH)) {
return -TARGET_EINVAL;
}
cur_mode = gcs_get_el0_mode(env);
if ((new_mode ^ cur_mode) & ts->gcs_el0_locked) {
return -TARGET_EBUSY;
}
if (new_mode & ~cur_mode & PR_SHADOW_STACK_ENABLE) {
abi_long gcspr;
if (ts->gcs_base || env->cp15.gcspr_el[0]) {
return -EINVAL;
}
gcspr = gcs_new_stack(ts);
if (gcspr == -1) {
return -TARGET_ENOMEM;
}
env->cp15.gcspr_el[0] = gcspr;
}
gcs_set_el0_mode(env, new_mode);
arm_rebuild_hflags(env);
return 0;
}
#define do_prctl_set_shadow_stack_status do_prctl_set_shadow_stack_status
static abi_long do_prctl_lock_shadow_stack_status(CPUArchState *env,
abi_long arg2)
{
ARMCPU *cpu = env_archcpu(env);
TaskState *ts = get_task_state(env_cpu(env));
if (!cpu_isar_feature(aa64_gcs, cpu)) {
return -EINVAL;
}
ts->gcs_el0_locked |= arg2;
return 0;
}
#define do_prctl_lock_shadow_stack_status do_prctl_lock_shadow_stack_status
#endif /* AARCH64_TARGET_PRCTL_H */
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#include "../arm/target_proc.h"
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/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef AARCH64_TARGET_PTRACE_H
#define AARCH64_TARGET_PTRACE_H
/* See arch/arm64/include/uapi/asm/ptrace.h. */
struct target_user_pt_regs {
uint64_t regs[31];
uint64_t sp;
uint64_t pc;
uint64_t pstate;
};
#endif /* AARCH64_TARGET_PTRACE_H */
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#include "../generic/target_resource.h"
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#ifndef AARCH64_TARGET_SIGNAL_H
#define AARCH64_TARGET_SIGNAL_H
#include "../generic/signal.h"
#define TARGET_SA_RESTORER 0x04000000
#define TARGET_SEGV_MTEAERR 8 /* Asynchronous ARM MTE error */
#define TARGET_SEGV_MTESERR 9 /* Synchronous ARM MTE exception */
#define TARGET_SEGV_CPERR 10 /* Control protection fault */
#define TARGET_ARCH_HAS_SETUP_FRAME
#define TARGET_ARCH_HAS_SIGTRAMP_PAGE 1
#endif /* AARCH64_TARGET_SIGNAL_H */
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#include "../generic/target_structs.h"
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#ifndef AARCH64_TARGET_SYSCALL_H
#define AARCH64_TARGET_SYSCALL_H
#if TARGET_BIG_ENDIAN
#define UNAME_MACHINE "aarch64_be"
#else
#define UNAME_MACHINE "aarch64"
#endif
#define UNAME_MINIMUM_RELEASE "3.8.0"
#define TARGET_CLONE_BACKWARDS
#define TARGET_MCL_CURRENT 1
#define TARGET_MCL_FUTURE 2
#define TARGET_MCL_ONFAULT 4
#endif /* AARCH64_TARGET_SYSCALL_H */
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#include "../generic/termbits.h"
BIN
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BIN
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+77
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/*
* aarch64 linux replacement vdso.
*
* Copyright 2023 Linaro, Ltd.
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include <asm/unistd.h>
/* ??? These are in include/elf.h, which is not ready for inclusion in asm. */
#define NT_GNU_PROPERTY_TYPE_0 5
#define GNU_PROPERTY_AARCH64_FEATURE_1_AND 0xc0000000
#define GNU_PROPERTY_AARCH64_FEATURE_1_BTI (1U << 0)
#define GNU_PROPERTY_AARCH64_FEATURE_1_PAC (1U << 1)
#define GNU_PROPERTY_AARCH64_FEATURE_1_DEFAULT \
(GNU_PROPERTY_AARCH64_FEATURE_1_BTI | GNU_PROPERTY_AARCH64_FEATURE_1_PAC)
.section .note.gnu.property
.align 3
.long 2f - 1f
.long 6f - 3f
.long NT_GNU_PROPERTY_TYPE_0
1: .string "GNU"
2: .align 3
3: .long GNU_PROPERTY_AARCH64_FEATURE_1_AND
.long 5f - 4f
4: .long GNU_PROPERTY_AARCH64_FEATURE_1_DEFAULT
5: .align 3
6:
.text
.macro endf name
.globl \name
.type \name, @function
.size \name, . - \name
.endm
.macro vdso_syscall name, nr
\name:
bti c
mov x8, #\nr
svc #0
ret
endf \name
.endm
.cfi_startproc
vdso_syscall __kernel_gettimeofday, __NR_gettimeofday
vdso_syscall __kernel_clock_gettime, __NR_clock_gettime
vdso_syscall __kernel_clock_getres, __NR_clock_getres
.cfi_endproc
/*
* TODO: The kernel makes a big deal of turning off the .cfi directives,
* because they cause libgcc to crash, but that's because they're wrong.
*
* For now, elide the unwind info for __kernel_rt_sigreturn and rely on
* the libgcc fallback routine as we have always done. This requires
* that the code sequence used be exact.
*
* Add a nop as a spacer to ensure that unwind does not pick up the
* unwind info from the preceding syscall.
*/
nop
__kernel_rt_sigreturn:
/* No BTI C insn here -- we arrive via RET. */
mov x8, #__NR_rt_sigreturn
sigreturn_region_start:
svc #0
sigreturn_region_end:
endf __kernel_rt_sigreturn
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/*
* Linker script for linux aarch64 replacement vdso.
*
* Copyright 2021 Linaro, Ltd.
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
VERSION {
LINUX_2.6.39 {
global:
__kernel_rt_sigreturn;
__kernel_gettimeofday;
__kernel_clock_gettime;
__kernel_clock_getres;
local: *;
};
}
PHDRS {
phdr PT_PHDR FLAGS(4) PHDRS;
load PT_LOAD FLAGS(7) FILEHDR PHDRS;
dynamic PT_DYNAMIC FLAGS(4);
eh_frame_hdr PT_GNU_EH_FRAME;
note PT_NOTE FLAGS(4);
}
SECTIONS {
/*
* We can't prelink to any address without knowing something about
* the virtual memory space of the host, since that leaks over into
* the available memory space of the guest.
*/
. = SIZEOF_HEADERS;
/*
* The following, including the FILEHDRS and PHDRS, are modified
* when we relocate the binary. We want them to be initially
* writable for the relocation; we'll force them read-only after.
*/
.note : { *(.note*) } :load :note
.dynamic : { *(.dynamic) } :load :dynamic
.dynsym : { *(.dynsym) } :load
/*
* There ought not be any real read-write data.
* But since we manipulated the segment layout,
* we have to put these sections somewhere.
*/
.data : {
*(.data*)
*(.sdata*)
*(.got.plt) *(.got)
*(.gnu.linkonce.d.*)
*(.bss*)
*(.dynbss*)
*(.gnu.linkonce.b.*)
}
.rodata : { *(.rodata*) }
.hash : { *(.hash) }
.gnu.hash : { *(.gnu.hash) }
.dynstr : { *(.dynstr) }
.gnu.version : { *(.gnu.version) }
.gnu.version_d : { *(.gnu.version_d) }
.gnu.version_r : { *(.gnu.version_r) }
.eh_frame_hdr : { *(.eh_frame_hdr) } :load :eh_frame_hdr
.eh_frame : { *(.eh_frame) } :load
.text : { *(.text*) } :load =0xd503201f
}