/* SPDX-License-Identifier: GPL-2.0-or-later */ static const struct hexagon_machine_config SA8775P_cdsp0 = { .cfgbase = 0x24000000 + 0x180000, .l2tcm_size = 0x00000000, .l2vic_base = 0x26300000 + 0x90000, .l2vic_size = 0x00001000, .csr_base = 0x26300000, .qtmr_region = 0x26300000 + 0xA1000, .cfgtable = { .l2tcm_base = 0x00002400, .reserved0 = 0x00000000, .subsystem_base = 0x00002638, .etm_base = 0x00002419, .l2cfg_base = 0x0000241a, .reserved1 = 0x0000241b, .l1s0_base = 0x00002500, .axi2_lowaddr = 0x00000000, .streamer_base = 0x00000000, .reserved2 = 0x00000000, .fastl2vic_base = 0x0000241e, .jtlb_size_entries = 0x00000080, .coproc_present = 0x00000001, .ext_contexts = 0x00000004, .vtcm_base = 0x00002500, .vtcm_size_kb = 0x00002000, .l2tag_size = 0x00000400, .l2ecomem_size = 0x00000000, .thread_enable_mask = 0x0000003f, .eccreg_base = 0x0000241f, .l2line_size = 0x00000080, .tiny_core = 0x00000000, .l2itcm_size = 0x00000000, .l2itcm_base = 0x00002400, .reserved3 = 0x00000000, .dtm_present = 0x00000000, .dma_version = 0x00000003, .hvx_vec_log_length = 0x00000007, .core_id = 0x00000000, .core_count = 0x00000000, .coproc2_reg0 = 0x00000040, .coproc2_reg1 = 0x00000020, .v2x_mode = 0x00000001, .coproc2_reg2 = 0x00000008, .coproc2_reg3 = 0x00000020, .coproc2_reg4 = 0x00000000, .coproc2_reg5 = 0x00000002, .coproc2_reg6 = 0x00000016, .coproc2_reg7 = 0x00000006, .acd_preset = 0x00000001, .mnd_preset = 0x00000000, .l1d_size_kb = 0x00000010, .l1i_size_kb = 0x00000020, .l1d_write_policy = 0x00000002, .vtcm_bank_width = 0x00000080, .reserved4 = 0x00000001, .reserved5 = 0x00000000, .reserved6 = 0x00000003, .coproc2_cvt_mpy_size = 0x0000000a, .consistency_domain = 0x000000e0, .capacity_domain = 0x00000080, .axi3_lowaddr = 0x00000000, }, };