/* SPDX-License-Identifier: GPL-2.0-or-later */ static const struct hexagon_machine_config v66g_1024 = { .cfgbase = 0xd8180000, .l2tcm_size = 0x00000000, .l2vic_base = 0xfc910000, .l2vic_size = 0x00001000, .csr_base = 0xfc900000, .qtmr_region = 0xfc921000, .cfgtable = { .l2tcm_base = 0x0000d800, .reserved0 = 0x0000d400, .subsystem_base = 0x0000fc90, .etm_base = 0x0000d805, .l2cfg_base = 0x0000d81a, .reserved1 = 0x00000000, .l1s0_base = 0x0000d820, .axi2_lowaddr = 0x00003000, .streamer_base = 0x00000000, .reserved2 = 0x0000d819, .fastl2vic_base = 0x0000d81e, .jtlb_size_entries = 0x00000080, .coproc_present = 0x00000001, .ext_contexts = 0x00000004, .vtcm_base = 0x0000d820, .vtcm_size_kb = 0x00000100, .l2tag_size = 0x00000400, .l2ecomem_size = 0x00000400, .thread_enable_mask = 0x0000000f, .eccreg_base = 0x0000d81f, .l2line_size = 0x00000080, .tiny_core = 0x00000000, .l2itcm_size = 0x00000000, .l2itcm_base = 0x0000d820, .reserved3 = 0x00000000, .dtm_present = 0x00000000, .dma_version = 0x00000000, .hvx_vec_log_length = 0x00000080, .core_id = 0x00000000, .core_count = 0x00000000, .coproc2_reg0 = 0x00000000, .coproc2_reg1 = 0x00000000, .v2x_mode = 0x00000000, .coproc2_reg2 = 0x00000000, .coproc2_reg3 = 0x00000000, .coproc2_reg4 = 0x00000000, .coproc2_reg5 = 0x00000000, .coproc2_reg6 = 0x00000000, .coproc2_reg7 = 0x00000000, .acd_preset = 0x00000000, .mnd_preset = 0x00000000, .l1d_size_kb = 0x00000000, .l1i_size_kb = 0x00000000, .l1d_write_policy = 0x00000000, .vtcm_bank_width = 0x00000000, .reserved4 = 0x00000000, .reserved5 = 0x00000000, .reserved6 = 0x00000000, .coproc2_cvt_mpy_size = 0x00000000, .consistency_domain = 0x00000000, .capacity_domain = 0x00000000, .axi3_lowaddr = 0x00000000, }, };