Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
34 lines
999 B
C
34 lines
999 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* QEMU fw_cfg helpers (LoongArch specific)
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*
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* Copyright (C) 2021 Loongson Technology Corporation Limited
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*/
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#include "qemu/osdep.h"
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#include "hw/loongarch/fw_cfg.h"
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#include "hw/loongarch/virt.h"
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#include "hw/nvram/fw_cfg.h"
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#include "system/system.h"
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static void fw_cfg_boot_set(void *opaque, const char *boot_device,
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Error **errp)
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{
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fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
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}
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FWCfgState *virt_fw_cfg_init(ram_addr_t ram_size, MachineState *ms)
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{
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FWCfgState *fw_cfg;
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int max_cpus = ms->smp.max_cpus;
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int smp_cpus = ms->smp.cpus;
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fw_cfg = fw_cfg_init_mem_dma(VIRT_FWCFG_BASE, &address_space_memory);
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fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
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fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
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fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
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qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
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return fw_cfg;
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}
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