Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
27 lines
844 B
C
27 lines
844 B
C
/*
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* QEMU RISC-V Advanced Interrupt Architecture (AIA)
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*
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* Copyright (C) 2019 Western Digital Corporation or its affiliates.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef HW_RISCV_AIA_H
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#define HW_RISCV_AIA_H
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#include "exec/hwaddr.h"
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uint32_t imsic_num_bits(uint32_t count);
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DeviceState *riscv_create_aia(bool msimode, int aia_guests,
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uint32_t m_imsic_stride,
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uint16_t num_sources,
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const MemMapEntry *aplic_m,
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const MemMapEntry *aplic_s,
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const MemMapEntry *imsic_m,
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const MemMapEntry *imsic_s,
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int socket, int base_hartid, int hart_count,
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uint32_t num_msis, uint32_t num_prio_bits);
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#endif
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