Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
120 lines
3.0 KiB
C
120 lines
3.0 KiB
C
/*
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* Axiado SD Host Controller with embedded PHY
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*
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* Author: Kuan-Jui Chiu <[email protected]>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "hw/sd/axiado_sdhci.h"
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#include "sdhci-internal.h"
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#include "qapi/error.h"
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#include "hw/core/qdev-properties.h"
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#include "qemu/log.h"
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#define EMMC_PHY_ID 0x00
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#define EMMC_PHY_STATUS 0x50
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#define DLL_RDY (1u << 0)
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#define CAL_DONE (1u << 6)
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static uint64_t emmc_phy_read(void *opaque, hwaddr offset, unsigned size)
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{
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uint32_t val = 0x00;
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switch (offset) {
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case EMMC_PHY_ID:
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val = 0x3dff6870;
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break;
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case EMMC_PHY_STATUS:
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val = DLL_RDY | CAL_DONE;
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break;
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default:
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qemu_log_mask(LOG_UNIMP,
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"Register 0x%" HWADDR_PRIx " not implemented\n", offset);
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break;
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}
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return val;
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}
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static void emmc_phy_write(void *opaque, hwaddr offset, uint64_t value,
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unsigned size)
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{
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qemu_log_mask(LOG_UNIMP,
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"Register 0x%" HWADDR_PRIx " not implemented\n", offset);
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}
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static const MemoryRegionOps emmc_phy_ops = {
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.read = emmc_phy_read,
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.write = emmc_phy_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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.impl = {
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.min_access_size = 4,
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.max_access_size = 4,
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},
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.valid = {
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.min_access_size = 4,
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.max_access_size = 4,
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}
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};
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static void axiado_sdhci_realize(DeviceState *dev, Error **errp)
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{
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AxiadoSDHCIState *s = AXIADO_SDHCI(dev);
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SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
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SysBusDevice *sdhci_sbd;
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qdev_prop_set_uint64(DEVICE(&s->sdhci), "capareg", 0x216737eed0b0);
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qdev_prop_set_uint64(DEVICE(&s->sdhci), "sd-spec-version", 3);
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sdhci_sbd = SYS_BUS_DEVICE(&s->sdhci);
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if (!sysbus_realize(sdhci_sbd, errp)) {
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return;
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}
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sysbus_init_mmio(sbd, sysbus_mmio_get_region(sdhci_sbd, 0));
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/* Propagate IRQ from SDHCI and SD bus */
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sysbus_pass_irq(sbd, sdhci_sbd);
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s->sd_bus = qdev_get_child_bus(DEVICE(sdhci_sbd), "sd-bus");
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/* Initialize eMMC PHY MMIO */
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memory_region_init_io(&s->emmc_phy, OBJECT(s), &emmc_phy_ops, s,
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"axiado.emmc-phy", 0x1000);
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sysbus_init_mmio(sbd, &s->emmc_phy);
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}
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static void axiado_sdhci_instance_init(Object *obj)
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{
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AxiadoSDHCIState *s = AXIADO_SDHCI(obj);
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object_initialize_child(OBJECT(s), "sdhci", &s->sdhci,
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TYPE_SYSBUS_SDHCI);
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}
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static void axiado_sdhci_class_init(ObjectClass *klass, const void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = axiado_sdhci_realize;
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dc->desc = "Axiado SD Host Controller with eMMC PHY";
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}
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static const TypeInfo axiado_sdhci_info = {
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.name = TYPE_AXIADO_SDHCI,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(AxiadoSDHCIState),
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.instance_init = axiado_sdhci_instance_init,
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.class_init = axiado_sdhci_class_init,
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};
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static void axiado_sdhci_register_types(void)
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{
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type_register_static(&axiado_sdhci_info);
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}
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type_init(axiado_sdhci_register_types);
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