Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
74 lines
1.9 KiB
C
74 lines
1.9 KiB
C
/*
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* ASPEED Coprocessor
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*
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* Copyright (C) 2025 ASPEED Technology Inc.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef ASPEED_COPROCESSOR_H
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#define ASPEED_COPROCESSOR_H
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#include "qom/object.h"
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#include "hw/arm/aspeed_soc.h"
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struct AspeedCoprocessorState {
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DeviceState parent;
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MemoryRegion *memory;
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MemoryRegion sdram;
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MemoryRegion *sram;
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MemoryRegion sram_alias;
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MemoryRegion uart_alias;
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Clock *sysclk;
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AspeedTimerCtrlState timerctrl;
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SerialMM *uart;
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int uart_dev;
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};
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#define TYPE_ASPEED_COPROCESSOR "aspeed-coprocessor"
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OBJECT_DECLARE_TYPE(AspeedCoprocessorState, AspeedCoprocessorClass,
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ASPEED_COPROCESSOR)
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struct AspeedCoprocessorClass {
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DeviceClass parent_class;
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/** valid_cpu_types: NULL terminated array of a single CPU type. */
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const char * const *valid_cpu_types;
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const hwaddr *memmap;
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const int *irqmap;
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};
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struct Aspeed27x0CoprocessorState {
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AspeedCoprocessorState parent;
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AspeedINTCState intc[2];
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UnimplementedDeviceState ipc[2];
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UnimplementedDeviceState pric[2];
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UnimplementedDeviceState otp;
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ARMv7MState armv7m;
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/*
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* SCU, SCUIO and FMC are not owned by this coprocessor: they are
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* shared with the main PSP SoC, and only aliased into this
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* coprocessor's own address space here.
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*/
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MemoryRegion scu_alias;
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MemoryRegion scuio_alias;
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MemoryRegion fmc_alias;
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Aspeed2700SCUState *scu;
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AspeedSCUState *scuio;
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AspeedSMCState *fmc;
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};
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#define TYPE_ASPEED27X0SSP_COPROCESSOR "aspeed27x0ssp-coprocessor"
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OBJECT_DECLARE_SIMPLE_TYPE(Aspeed27x0CoprocessorState,
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ASPEED27X0SSP_COPROCESSOR)
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#define TYPE_ASPEED27X0TSP_COPROCESSOR "aspeed27x0tsp-coprocessor"
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DECLARE_OBJ_CHECKERS(Aspeed27x0CoprocessorState, AspeedCoprocessorClass,
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ASPEED27X0TSP_COPROCESSOR, TYPE_ASPEED27X0TSP_COPROCESSOR)
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#endif /* ASPEED_COPROCESSOR_H */
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