Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
38 lines
826 B
C
38 lines
826 B
C
/*
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* ASPEED I3C Controller
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*
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* Copyright (C) 2021 ASPEED Technology Inc.
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* Copyright (C) 2023 Google, LLC
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*
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* This code is licensed under the GPL version 2 or later. See
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* the COPYING file in the top-level directory.
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*/
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#ifndef ASPEED_I3C_H
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#define ASPEED_I3C_H
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#include "hw/i3c/dw-i3c.h"
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#include "hw/core/sysbus.h"
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#define TYPE_ASPEED_I3C "aspeed.i3c"
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OBJECT_DECLARE_TYPE(AspeedI3CState, AspeedI3CClass, ASPEED_I3C)
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#define ASPEED_I3C_NR_REGS (0x70 >> 2)
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#define ASPEED_I3C_NR_DEVICES 6
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struct AspeedI3CState {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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MemoryRegion iomem_container;
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qemu_irq irq;
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uint32_t regs[ASPEED_I3C_NR_REGS];
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DWI3C devices[ASPEED_I3C_NR_DEVICES];
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uint8_t id;
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};
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I3CBus *aspeed_i3c_get_bus(AspeedI3CState *s, uint8_t bus_num);
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#endif /* ASPEED_I3C_H */
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