Files
Yaya48 cf256aa081 Import QEMU upstream snapshot d2e570c
Upstream: https://gitlab.com/qemu-project/qemu.git

Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
2026-08-31 02:15:30 +02:00

54 lines
1.4 KiB
C

/*
* Coherent Processing System emulation.
*
* Copyright (c) 2016 Imagination Technologies
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef MIPS_CPS_H
#define MIPS_CPS_H
#include "hw/core/sysbus.h"
#include "hw/core/clock.h"
#include "hw/misc/mips_cmgcr.h"
#include "hw/intc/mips_gic.h"
#include "hw/misc/mips_cpc.h"
#include "hw/misc/mips_itu.h"
#include "target/mips/cpu.h"
#include "qom/object.h"
#define TYPE_MIPS_CPS "mips-cps"
OBJECT_DECLARE_SIMPLE_TYPE(MIPSCPSState, MIPS_CPS)
struct MIPSCPSState {
SysBusDevice parent_obj;
uint32_t num_vp;
uint32_t num_irq;
char *cpu_type;
bool cpu_is_bigendian;
MemoryRegion container;
MIPSGCRState gcr;
MIPSGICState gic;
MIPSCPCState cpc;
MIPSITUState itu;
Clock *clock;
};
qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number);
#endif