Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
47 lines
1.0 KiB
C
47 lines
1.0 KiB
C
/*
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* ASPEED XDMA Controller
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* Eddie James <[email protected]>
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*
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* Copyright (C) 2019 IBM Corp.
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef ASPEED_XDMA_H
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#define ASPEED_XDMA_H
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#include "hw/core/sysbus.h"
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#include "qom/object.h"
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#define TYPE_ASPEED_XDMA "aspeed.xdma"
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#define TYPE_ASPEED_2400_XDMA TYPE_ASPEED_XDMA "-ast2400"
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#define TYPE_ASPEED_2500_XDMA TYPE_ASPEED_XDMA "-ast2500"
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#define TYPE_ASPEED_2600_XDMA TYPE_ASPEED_XDMA "-ast2600"
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OBJECT_DECLARE_TYPE(AspeedXDMAState, AspeedXDMAClass, ASPEED_XDMA)
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#define ASPEED_XDMA_NUM_REGS (ASPEED_XDMA_REG_SIZE / sizeof(uint32_t))
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#define ASPEED_XDMA_REG_SIZE 0x7C
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struct AspeedXDMAState {
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SysBusDevice parent;
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MemoryRegion iomem;
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qemu_irq irq;
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char bmc_cmdq_readp_set;
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uint32_t regs[ASPEED_XDMA_NUM_REGS];
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};
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struct AspeedXDMAClass {
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SysBusDeviceClass parent_class;
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uint8_t cmdq_endp;
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uint8_t cmdq_wrp;
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uint8_t cmdq_rdp;
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uint8_t intr_ctrl;
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uint32_t intr_ctrl_mask;
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uint8_t intr_status;
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uint32_t intr_complete;
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};
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#endif /* ASPEED_XDMA_H */
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