Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
43 lines
984 B
C
43 lines
984 B
C
/*
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* Flush the host cpu caches.
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef QEMU_CACHEFLUSH_H
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#define QEMU_CACHEFLUSH_H
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/**
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* flush_idcache_range:
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* @rx: instruction address
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* @rw: data address
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* @len: length to flush
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*
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* Flush @len bytes of the data cache at @rw and the icache at @rx
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* to bring them in sync. The two addresses may be different virtual
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* mappings of the same physical page(s).
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*/
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#if defined(__x86_64__) || defined(__s390x__)
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static inline void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len)
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{
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/* icache is coherent and does not require flushing. */
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}
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#elif defined(EMSCRIPTEN)
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static inline void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len)
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{
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/* Wasm doesn't have executable region of memory. */
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}
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#else
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void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len);
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#endif
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#endif /* QEMU_CACHEFLUSH_H */
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