Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
40 lines
1014 B
C
40 lines
1014 B
C
/*
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* s390x PCI definitions
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*
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* Copyright 2025 IBM Corp.
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* Author(s): Jared Rossi <[email protected]>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef PCI_H
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#define PCI_H
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#include <stdint.h>
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#include <stdbool.h>
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#include "clp.h"
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#define ZPCI_CREATE_REQ(handle, space, len) \
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((uint64_t) handle << 32 | space << 16 | len)
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union register_pair {
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unsigned __int128 pair;
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struct {
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unsigned long even;
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unsigned long odd;
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};
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};
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#define PCI_CFGBAR 0xF /* Base Address Register for config space */
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#define PCI_CMD_REG 0x4 /* Offset of command register */
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#define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */
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#define PCI_BUS_MASTER_MASK 0x0020 /* LE bit 3 of 16 bit register */
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int pci_write(uint32_t fhandle, uint64_t offset, uint8_t pcias, uint64_t data,
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uint8_t len);
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int pci_read(uint32_t fhandle, uint64_t offset, uint8_t pcias, void *buf,
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uint8_t len);
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#endif
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