Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
32 lines
1.1 KiB
C
32 lines
1.1 KiB
C
/*
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* RISC-V timer header file.
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*
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* Copyright (c) 2022 Rivos Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef RISCV_TIME_HELPER_H
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#define RISCV_TIME_HELPER_H
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#include "cpu.h"
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#include "qemu/timer.h"
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void riscv_timer_write_timecmp(CPURISCVState *env, QEMUTimer *timer,
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uint64_t timecmp, uint64_t delta,
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uint32_t timer_irq);
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void riscv_timer_stce_changed(CPURISCVState *env, bool is_m_mode, bool enable);
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void riscv_timer_init(RISCVCPU *cpu);
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#endif
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