Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
61 lines
1.3 KiB
C
61 lines
1.3 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Define i386 target-specific constraint sets.
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* Copyright (c) 2021 Linaro
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*/
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/*
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* C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
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* Each operand should be a sequence of constraint letters as defined by
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* tcg-target-con-str.h; the constraint combination is inclusive or.
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*
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* C_N1_Im(...) defines a constraint set with 1 output and <m> inputs,
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* except that the output must use a new register.
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*
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* C_Nn_Om_Ik(...) defines a constraint set with <n + m> outputs and <k>
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* inputs, except that the first <n> outputs must use new registers.
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*/
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C_O0_I1(r)
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C_O0_I2(L, L)
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C_O0_I2(qi, r)
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C_O0_I2(re, r)
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C_O0_I2(ri, r)
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C_O0_I2(r, reT)
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C_O0_I2(s, L)
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C_O0_I2(x, r)
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C_O0_I3(L, L, L)
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C_O0_I3(s, L, L)
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C_O0_I4(L, L, L, L)
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C_O0_I4(r, r, ri, ri)
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C_O1_I1(r, 0)
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C_O1_I1(r, L)
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C_O1_I1(r, q)
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C_O1_I1(r, r)
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C_O1_I1(x, r)
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C_O1_I1(x, x)
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C_O1_I2(q, 0, qi)
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C_O1_I2(q, r, reT)
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C_O1_I2(r, 0, ci)
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C_O1_I2(r, 0, r)
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C_O1_I2(r, 0, re)
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C_O1_I2(r, 0, reZ)
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C_O1_I2(r, 0, ri)
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C_O1_I2(r, 0, rI)
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C_O1_I2(r, L, L)
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C_O1_I2(r, r, r)
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C_O1_I2(r, r, re)
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C_O1_I2(r, r, ri)
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C_O1_I2(r, rO, re)
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C_O1_I2(x, x, x)
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C_N1_I2(r, r, r)
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C_N1_I2(r, r, rW)
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C_O1_I3(x, 0, x, x)
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C_O1_I3(x, x, x, x)
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C_O1_I4(x, x, x, xO, x)
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C_O1_I4(r, r, reT, r, 0)
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C_O1_I4(r, r, r, ri, ri)
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C_O2_I1(r, r, L)
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C_O2_I2(a, d, a, r)
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C_O2_I2(r, r, L, L)
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C_O2_I3(a, d, 0, 1, r)
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