Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
141 lines
3.7 KiB
C
141 lines
3.7 KiB
C
/*
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* QTest for Intel IOMMU (VT-d) with iommu-testdev
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*
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* This QTest file is used to test the Intel IOMMU with iommu-testdev so that
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* we can test VT-d without any guest kernel or firmware.
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*
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* Copyright (c) 2026 Fengyuan Yu <[email protected]>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "libqtest.h"
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#include "libqos/pci.h"
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#include "libqos/pci-pc.h"
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#include "hw/i386/intel_iommu_internal.h"
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#include "hw/misc/iommu-testdev.h"
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#include "libqos/qos-intel-iommu.h"
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#define DMA_LEN 4
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static uint64_t intel_iommu_expected_gpa(uint64_t iova)
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{
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return (QVTD_PT_VAL & VTD_PAGE_MASK_4K) + (iova & 0xfff);
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}
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static void run_intel_iommu_translation(const QVTDTestConfig *cfg)
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{
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QTestState *qts;
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QPCIBus *pcibus;
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QPCIDevice *dev;
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QPCIBar bar;
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if (!qtest_has_machine("q35")) {
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g_test_skip("q35 machine not available");
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return;
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}
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/* Initialize QEMU environment for Intel IOMMU testing */
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qts = qtest_initf("-machine q35 -smp 1 -m 512 -net none "
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"%s -device iommu-testdev",
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qvtd_iommu_args(cfg->trans_mode));
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/* Check CAP/ECAP capabilities for required translation mode */
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if (!qvtd_check_caps(qts, cfg->trans_mode)) {
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qtest_quit(qts);
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return;
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}
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/* Setup and configure IOMMU-testdev PCI device */
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dev = qvtd_setup_qtest_pci_device(qts, &pcibus, &bar);
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g_assert(dev);
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g_test_message("### Intel IOMMU translation mode=%d ###", cfg->trans_mode);
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qvtd_run_translation_case(qts, dev, bar, Q35_HOST_BRIDGE_IOMMU_ADDR, cfg);
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g_free(dev);
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qpci_free_pc(pcibus);
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qtest_quit(qts);
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}
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static void test_intel_iommu_legacy_pt(void)
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{
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QVTDTestConfig cfg = {
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.trans_mode = QVTD_TM_LEGACY_PT,
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.dma_gpa = QVTD_IOVA, /* pass-through: GPA == IOVA */
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.dma_len = DMA_LEN,
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.expected_result = 0,
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};
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run_intel_iommu_translation(&cfg);
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}
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static void test_intel_iommu_legacy_trans(void)
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{
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QVTDTestConfig cfg = {
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.trans_mode = QVTD_TM_LEGACY_TRANS,
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.dma_gpa = intel_iommu_expected_gpa(QVTD_IOVA),
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.dma_len = DMA_LEN,
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.expected_result = 0,
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};
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run_intel_iommu_translation(&cfg);
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}
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static void test_intel_iommu_scalable_pt(void)
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{
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QVTDTestConfig cfg = {
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.trans_mode = QVTD_TM_SCALABLE_PT,
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.dma_gpa = QVTD_IOVA, /* pass-through: GPA == IOVA */
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.dma_len = DMA_LEN,
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.expected_result = 0,
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};
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run_intel_iommu_translation(&cfg);
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}
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static void test_intel_iommu_scalable_slt(void)
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{
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QVTDTestConfig cfg = {
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.trans_mode = QVTD_TM_SCALABLE_SLT,
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.dma_gpa = intel_iommu_expected_gpa(QVTD_IOVA),
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.dma_len = DMA_LEN,
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.expected_result = 0,
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};
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run_intel_iommu_translation(&cfg);
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}
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static void test_intel_iommu_scalable_flt(void)
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{
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QVTDTestConfig cfg = {
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.trans_mode = QVTD_TM_SCALABLE_FLT,
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.dma_gpa = intel_iommu_expected_gpa(QVTD_IOVA),
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.dma_len = DMA_LEN,
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.expected_result = 0,
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};
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run_intel_iommu_translation(&cfg);
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}
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int main(int argc, char **argv)
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{
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g_test_init(&argc, &argv, NULL);
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/* Legacy mode tests */
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qtest_add_func("/iommu-testdev/intel/legacy-pt",
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test_intel_iommu_legacy_pt);
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qtest_add_func("/iommu-testdev/intel/legacy-trans",
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test_intel_iommu_legacy_trans);
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/* Scalable mode tests */
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qtest_add_func("/iommu-testdev/intel/scalable-pt",
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test_intel_iommu_scalable_pt);
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qtest_add_func("/iommu-testdev/intel/scalable-slt",
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test_intel_iommu_scalable_slt);
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qtest_add_func("/iommu-testdev/intel/scalable-flt",
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test_intel_iommu_scalable_flt);
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return g_test_run();
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}
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