Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
85 lines
2.7 KiB
C
85 lines
2.7 KiB
C
/*
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* Copyright (c) 2025 Bernhard Beschow <[email protected]>
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*
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* i.MX8MP ANALOG IP block emulation code
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef IMX8MP_ANALOG_H
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#define IMX8MP_ANALOG_H
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#include "qom/object.h"
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#include "hw/core/sysbus.h"
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enum IMX8MPAnalogRegisters {
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ANALOG_AUDIO_PLL1_GEN_CTRL = 0x000 / 4,
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ANALOG_AUDIO_PLL1_FDIV_CTL0 = 0x004 / 4,
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ANALOG_AUDIO_PLL1_FDIV_CTL1 = 0x008 / 4,
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ANALOG_AUDIO_PLL1_SSCG_CTRL = 0x00c / 4,
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ANALOG_AUDIO_PLL1_MNIT_CTRL = 0x010 / 4,
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ANALOG_AUDIO_PLL2_GEN_CTRL = 0x014 / 4,
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ANALOG_AUDIO_PLL2_FDIV_CTL0 = 0x018 / 4,
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ANALOG_AUDIO_PLL2_FDIV_CTL1 = 0x01c / 4,
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ANALOG_AUDIO_PLL2_SSCG_CTRL = 0x020 / 4,
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ANALOG_AUDIO_PLL2_MNIT_CTRL = 0x024 / 4,
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ANALOG_VIDEO_PLL1_GEN_CTRL = 0x028 / 4,
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ANALOG_VIDEO_PLL1_FDIV_CTL0 = 0x02c / 4,
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ANALOG_VIDEO_PLL1_FDIV_CTL1 = 0x030 / 4,
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ANALOG_VIDEO_PLL1_SSCG_CTRL = 0x034 / 4,
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ANALOG_VIDEO_PLL1_MNIT_CTRL = 0x038 / 4,
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ANALOG_DRAM_PLL_GEN_CTRL = 0x050 / 4,
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ANALOG_DRAM_PLL_FDIV_CTL0 = 0x054 / 4,
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ANALOG_DRAM_PLL_FDIV_CTL1 = 0x058 / 4,
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ANALOG_DRAM_PLL_SSCG_CTRL = 0x05c / 4,
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ANALOG_DRAM_PLL_MNIT_CTRL = 0x060 / 4,
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ANALOG_GPU_PLL_GEN_CTRL = 0x064 / 4,
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ANALOG_GPU_PLL_FDIV_CTL0 = 0x068 / 4,
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ANALOG_GPU_PLL_LOCKD_CTRL = 0x06c / 4,
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ANALOG_GPU_PLL_MNIT_CTRL = 0x070 / 4,
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ANALOG_VPU_PLL_GEN_CTRL = 0x074 / 4,
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ANALOG_VPU_PLL_FDIV_CTL0 = 0x078 / 4,
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ANALOG_VPU_PLL_LOCKD_CTRL = 0x07c / 4,
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ANALOG_VPU_PLL_MNIT_CTRL = 0x080 / 4,
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ANALOG_ARM_PLL_GEN_CTRL = 0x084 / 4,
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ANALOG_ARM_PLL_FDIV_CTL0 = 0x088 / 4,
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ANALOG_ARM_PLL_LOCKD_CTRL = 0x08c / 4,
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ANALOG_ARM_PLL_MNIT_CTRL = 0x090 / 4,
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ANALOG_SYS_PLL1_GEN_CTRL = 0x094 / 4,
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ANALOG_SYS_PLL1_FDIV_CTL0 = 0x098 / 4,
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ANALOG_SYS_PLL1_LOCKD_CTRL = 0x09c / 4,
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ANALOG_SYS_PLL1_MNIT_CTRL = 0x100 / 4,
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ANALOG_SYS_PLL2_GEN_CTRL = 0x104 / 4,
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ANALOG_SYS_PLL2_FDIV_CTL0 = 0x108 / 4,
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ANALOG_SYS_PLL2_LOCKD_CTRL = 0x10c / 4,
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ANALOG_SYS_PLL2_MNIT_CTRL = 0x110 / 4,
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ANALOG_SYS_PLL3_GEN_CTRL = 0x114 / 4,
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ANALOG_SYS_PLL3_FDIV_CTL0 = 0x118 / 4,
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ANALOG_SYS_PLL3_LOCKD_CTRL = 0x11c / 4,
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ANALOG_SYS_PLL3_MNIT_CTRL = 0x120 / 4,
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ANALOG_OSC_MISC_CFG = 0x124 / 4,
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ANALOG_ANAMIX_PLL_MNIT_CTL = 0x128 / 4,
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ANALOG_DIGPROG = 0x800 / 4,
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ANALOG_MAX,
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};
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#define TYPE_IMX8MP_ANALOG "imx8mp.analog"
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OBJECT_DECLARE_SIMPLE_TYPE(IMX8MPAnalogState, IMX8MP_ANALOG)
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struct IMX8MPAnalogState {
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SysBusDevice parent_obj;
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struct {
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MemoryRegion container;
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MemoryRegion analog;
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} mmio;
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uint32_t analog[ANALOG_MAX];
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/* Property for variant-specific reset values */
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uint32_t arm_pll_fdiv_ctl0_reset;
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};
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#endif /* IMX8MP_ANALOG_H */
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