Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
39 lines
1000 B
C
39 lines
1000 B
C
/*
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* AArch64 gcs functions for linux-user
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef AARCH64_GCS_INTERNAL_H
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#define AARCH64_GCS_INTERNAL_H
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#ifndef PR_SHADOW_STACK_ENABLE
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# define PR_SHADOW_STACK_ENABLE (1U << 0)
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# define PR_SHADOW_STACK_WRITE (1U << 1)
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# define PR_SHADOW_STACK_PUSH (1U << 2)
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#endif
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static inline uint64_t gcs_get_el0_mode(CPUArchState *env)
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{
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uint64_t cr = env->cp15.gcscr_el[0];
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abi_ulong flags = 0;
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flags |= cr & GCSCR_PCRSEL ? PR_SHADOW_STACK_ENABLE : 0;
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flags |= cr & GCSCR_STREN ? PR_SHADOW_STACK_WRITE : 0;
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flags |= cr & GCSCR_PUSHMEN ? PR_SHADOW_STACK_PUSH : 0;
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return flags;
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}
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static inline void gcs_set_el0_mode(CPUArchState *env, uint64_t flags)
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{
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uint64_t cr = GCSCRE0_NTR;
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cr |= flags & PR_SHADOW_STACK_ENABLE ? GCSCR_RVCHKEN | GCSCR_PCRSEL : 0;
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cr |= flags & PR_SHADOW_STACK_WRITE ? GCSCR_STREN : 0;
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cr |= flags & PR_SHADOW_STACK_PUSH ? GCSCR_PUSHMEN : 0;
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env->cp15.gcscr_el[0] = cr;
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}
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#endif
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