Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
97 lines
2.8 KiB
C
97 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include "qemu/osdep.h"
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#include "qemu.h"
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#include "loader.h"
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#include "elf.h"
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#include "target_elf.h"
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void elf_core_copy_regs(target_elf_gregset_t *r, const CPUArchState *env)
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{
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CPUSPARCState *e = (CPUSPARCState *)env;
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int i;
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memset(r, 0, sizeof(*r));
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#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
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/* Linux kernel layout for sparc64 (arch/sparc/include/asm/elf_64.h):
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* [0..7] G0-G7
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* [8..15] O0-O7
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* [16..23] L0-L7
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* [24..31] I0-I7
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* [32] TSTATE
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* [33] TPC
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* [34] TNPC
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* [35] Y
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*/
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for (i = 0; i < 8; i++) {
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r->regs[i] = tswap64(env->gregs[i]);
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r->regs[8 + i] = tswap64(env->regwptr[WREG_O0 + i]);
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r->regs[16 + i] = tswap64(env->regwptr[WREG_L0 + i]);
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r->regs[24 + i] = tswap64(env->regwptr[WREG_I0 + i]);
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}
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r->regs[32] = tswap64(sparc64_tstate(e));
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r->regs[33] = tswap64(env->pc);
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r->regs[34] = tswap64(env->npc);
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r->regs[35] = tswap64(env->y);
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#else
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/* Linux kernel layout for sparc32 (arch/sparc/include/asm/elf_32.h):
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* [0] PSR
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* [1] PC
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* [2] NPC
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* [3] Y
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* [4..11] G0-G7
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* [12..19] O0-O7
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* [20..27] L0-L7
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* [28..35] I0-I7
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* [36..37] reserved (stack_check)
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*/
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r->regs[0] = tswap32(cpu_get_psr(e));
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r->regs[1] = tswap32(env->pc);
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r->regs[2] = tswap32(env->npc);
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r->regs[3] = tswap32(env->y);
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for (i = 0; i < 8; i++) {
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r->regs[4 + i] = tswap32(env->gregs[i]);
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r->regs[12 + i] = tswap32(env->regwptr[WREG_O0 + i]);
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r->regs[20 + i] = tswap32(env->regwptr[WREG_L0 + i]);
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r->regs[28 + i] = tswap32(env->regwptr[WREG_I0 + i]);
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}
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#endif
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}
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const char *get_elf_cpu_model(uint32_t eflags)
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{
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#ifdef TARGET_SPARC64
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return "TI UltraSparc II";
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#else
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return "Fujitsu MB86904";
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#endif
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}
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abi_ulong get_elf_hwcap(CPUState *cs)
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{
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/* There are not many sparc32 hwcap bits -- we have all of them. */
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uint32_t r = HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR |
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HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV;
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#ifdef TARGET_SPARC64
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CPUSPARCState *env = cpu_env(cs);
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uint32_t features = env->def.features;
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r |= HWCAP_SPARC_V9 | HWCAP_SPARC_V8PLUS;
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/* 32x32 multiply and divide are efficient. */
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r |= HWCAP_SPARC_MUL32 | HWCAP_SPARC_DIV32;
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/* We don't have an internal feature bit for this. */
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r |= HWCAP_SPARC_POPC;
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r |= features & CPU_FEATURE_FSMULD ? HWCAP_SPARC_FSMULD : 0;
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r |= features & CPU_FEATURE_VIS1 ? HWCAP_SPARC_VIS : 0;
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r |= features & CPU_FEATURE_VIS2 ? HWCAP_SPARC_VIS2 : 0;
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r |= features & CPU_FEATURE_FMAF ? HWCAP_SPARC_FMAF : 0;
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r |= features & CPU_FEATURE_VIS3 ? HWCAP_SPARC_VIS3 : 0;
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r |= features & CPU_FEATURE_IMA ? HWCAP_SPARC_IMA : 0;
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#endif
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return r;
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}
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