Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
44 lines
923 B
C
44 lines
923 B
C
/* SPDX-License-Identifier: MIT */
|
|
/*
|
|
* Define PowerPC target-specific constraint sets.
|
|
* Copyright (c) 2021 Linaro
|
|
*/
|
|
|
|
/*
|
|
* C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
|
|
* Each operand should be a sequence of constraint letters as defined by
|
|
* tcg-target-con-str.h; the constraint combination is inclusive or.
|
|
*/
|
|
C_O0_I1(r)
|
|
C_O0_I2(r, r)
|
|
C_O0_I2(r, rC)
|
|
C_O0_I2(v, r)
|
|
C_O0_I3(r, r, r)
|
|
C_O0_I3(o, m, r)
|
|
C_O0_I4(r, r, rU, rC)
|
|
C_O0_I4(r, r, r, r)
|
|
C_O1_I1(r, r)
|
|
C_O1_I1(v, r)
|
|
C_O1_I1(v, v)
|
|
C_O1_I1(v, vr)
|
|
C_O1_I2(r, 0, rZ)
|
|
C_O1_I2(r, rI, r)
|
|
C_O1_I2(r, r, r)
|
|
C_O1_I2(r, r, ri)
|
|
C_O1_I2(r, r, rC)
|
|
C_O1_I2(r, r, rI)
|
|
C_O1_I2(r, r, rT)
|
|
C_O1_I2(r, r, rU)
|
|
C_O1_I2(r, r, rZM)
|
|
C_O1_I2(r, r, rZW)
|
|
C_O1_I2(r, rI, rN)
|
|
C_O1_I2(r, rZM, rZM)
|
|
C_O1_I2(v, v, v)
|
|
C_O1_I3(v, v, v, v)
|
|
C_O1_I4(v, v, v, vZM, v)
|
|
C_O1_I4(r, r, rC, rZ, rZ)
|
|
C_O1_I4(r, r, r, rU, rC)
|
|
C_O2_I1(r, r, r)
|
|
C_N1O1_I1(o, m, r)
|
|
C_O2_I2(r, r, r, r)
|