Use range loop (if possible)

This commit is contained in:
Filip Gawin authored and Jordan Woyak committed 2020-07-18 18:29:16 -05:00
1 parent 0fa4812c2f
commit 0ede5d1537
15 files changed
+92 -100

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+2 -2
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@@ -145,9 +145,9 @@ bool DSPCore_Init(const DSPInitOptions& opts)
memset(&g_dsp.r, 0, sizeof(g_dsp.r));
std::fill(std::begin(g_dsp.reg_stack_ptr), std::end(g_dsp.reg_stack_ptr), 0);
std::fill(std::begin(g_dsp.reg_stack_ptrs), std::end(g_dsp.reg_stack_ptrs), 0);
for (auto& stack : g_dsp.reg_stack)
for (auto& stack : g_dsp.reg_stacks)
std::fill(std::begin(stack), std::end(stack), 0);
// Fill IRAM with HALT opcodes.
+2 -2
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@@ -275,7 +275,7 @@ struct SDSP
// Bits are defined in a struct in DSP.cpp.
u16 cr;
u8 reg_stack_ptr[4];
u8 reg_stack_ptrs[4];
u8 exceptions; // pending exceptions
volatile bool external_interrupt_waiting;
bool reset_dspjit_codespace;
@@ -286,7 +286,7 @@ struct SDSP
// The real DSP has different depths for the different stacks, but it would
// be strange if any ucode relied on stack overflows since on the DSP, when
// the stack overflows, you're screwed.
u16 reg_stack[4][DSP_STACK_DEPTH];
u16 reg_stacks[4][DSP_STACK_DEPTH];
// For debugging.
u32 iram_crc;
+6 -6
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@@ -15,16 +15,16 @@ namespace DSP
{
static void dsp_reg_stack_push(size_t stack_reg)
{
g_dsp.reg_stack_ptr[stack_reg]++;
g_dsp.reg_stack_ptr[stack_reg] &= DSP_STACK_MASK;
g_dsp.reg_stack[stack_reg][g_dsp.reg_stack_ptr[stack_reg]] = g_dsp.r.st[stack_reg];
g_dsp.reg_stack_ptrs[stack_reg]++;
g_dsp.reg_stack_ptrs[stack_reg] &= DSP_STACK_MASK;
g_dsp.reg_stacks[stack_reg][g_dsp.reg_stack_ptrs[stack_reg]] = g_dsp.r.st[stack_reg];
}
static void dsp_reg_stack_pop(size_t stack_reg)
{
g_dsp.r.st[stack_reg] = g_dsp.reg_stack[stack_reg][g_dsp.reg_stack_ptr[stack_reg]];
g_dsp.reg_stack_ptr[stack_reg]--;
g_dsp.reg_stack_ptr[stack_reg] &= DSP_STACK_MASK;
g_dsp.r.st[stack_reg] = g_dsp.reg_stacks[stack_reg][g_dsp.reg_stack_ptrs[stack_reg]];
g_dsp.reg_stack_ptrs[stack_reg]--;
g_dsp.reg_stack_ptrs[stack_reg] &= DSP_STACK_MASK;
}
void dsp_reg_store_stack(StackRegister stack_reg, u16 val)
+2 -2
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@@ -478,9 +478,9 @@ Gen::OpArg DSPEmitter::M_SDSP_r_st(size_t index)
return MDisp(R15, static_cast<int>(offsetof(SDSP, r.st[index])));
}
Gen::OpArg DSPEmitter::M_SDSP_reg_stack_ptr(size_t index)
Gen::OpArg DSPEmitter::M_SDSP_reg_stack_ptrs(size_t index)
{
return MDisp(R15, static_cast<int>(offsetof(SDSP, reg_stack_ptr[index])));
return MDisp(R15, static_cast<int>(offsetof(SDSP, reg_stack_ptrs[index])));
}
} // namespace DSP::JIT::x64
+1 -1
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@@ -283,7 +283,7 @@ private:
Gen::OpArg M_SDSP_cr();
Gen::OpArg M_SDSP_external_interrupt_waiting();
Gen::OpArg M_SDSP_r_st(size_t index);
Gen::OpArg M_SDSP_reg_stack_ptr(size_t index);
Gen::OpArg M_SDSP_reg_stack_ptrs(size_t index);
// Ext command helpers
void popExtValueToReg();
+14 -14
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@@ -13,53 +13,53 @@ using namespace Gen;
namespace DSP::JIT::x64
{
// clobbers:
// EAX = (s8)g_dsp.reg_stack_ptr[reg_index]
// EAX = (s8)g_dsp.reg_stack_ptrs[reg_index]
// expects:
void DSPEmitter::dsp_reg_stack_push(StackRegister stack_reg)
{
const auto reg_index = static_cast<size_t>(stack_reg);
// g_dsp.reg_stack_ptr[reg_index]++;
// g_dsp.reg_stack_ptr[reg_index] &= DSP_STACK_MASK;
MOV(8, R(AL), M_SDSP_reg_stack_ptr(reg_index));
// g_dsp.reg_stack_ptrs[reg_index]++;
// g_dsp.reg_stack_ptrs[reg_index] &= DSP_STACK_MASK;
MOV(8, R(AL), M_SDSP_reg_stack_ptrs(reg_index));
ADD(8, R(AL), Imm8(1));
AND(8, R(AL), Imm8(DSP_STACK_MASK));
MOV(8, M_SDSP_reg_stack_ptr(reg_index), R(AL));
MOV(8, M_SDSP_reg_stack_ptrs(reg_index), R(AL));
X64Reg tmp1 = m_gpr.GetFreeXReg();
X64Reg tmp2 = m_gpr.GetFreeXReg();
// g_dsp.reg_stack[reg_index][g_dsp.reg_stack_ptr[reg_index]] = g_dsp.r[DSP_REG_ST0 + reg_index];
// g_dsp.reg_stack[reg_index][g_dsp.reg_stack_ptrs[reg_index]] = g_dsp.r[DSP_REG_ST0 + reg_index];
MOV(16, R(tmp1), M_SDSP_r_st(reg_index));
MOVZX(64, 8, RAX, R(AL));
MOV(64, R(tmp2), ImmPtr(g_dsp.reg_stack[reg_index]));
MOV(64, R(tmp2), ImmPtr(g_dsp.reg_stacks[reg_index]));
MOV(16, MComplex(tmp2, EAX, SCALE_2, 0), R(tmp1));
m_gpr.PutXReg(tmp1);
m_gpr.PutXReg(tmp2);
}
// clobbers:
// EAX = (s8)g_dsp.reg_stack_ptr[reg_index]
// EAX = (s8)g_dsp.reg_stack_ptrs[reg_index]
// expects:
void DSPEmitter::dsp_reg_stack_pop(StackRegister stack_reg)
{
const auto reg_index = static_cast<size_t>(stack_reg);
// g_dsp.r[DSP_REG_ST0 + reg_index] = g_dsp.reg_stack[reg_index][g_dsp.reg_stack_ptr[reg_index]];
MOV(8, R(AL), M_SDSP_reg_stack_ptr(reg_index));
// g_dsp.r[DSP_REG_ST0 + reg_index] = g_dsp.reg_stack[reg_index][g_dsp.reg_stack_ptrs[reg_index]];
MOV(8, R(AL), M_SDSP_reg_stack_ptrs(reg_index));
X64Reg tmp1 = m_gpr.GetFreeXReg();
X64Reg tmp2 = m_gpr.GetFreeXReg();
MOVZX(64, 8, RAX, R(AL));
MOV(64, R(tmp2), ImmPtr(g_dsp.reg_stack[reg_index]));
MOV(64, R(tmp2), ImmPtr(g_dsp.reg_stacks[reg_index]));
MOV(16, R(tmp1), MComplex(tmp2, EAX, SCALE_2, 0));
MOV(16, M_SDSP_r_st(reg_index), R(tmp1));
m_gpr.PutXReg(tmp1);
m_gpr.PutXReg(tmp2);
// g_dsp.reg_stack_ptr[reg_index]--;
// g_dsp.reg_stack_ptr[reg_index] &= DSP_STACK_MASK;
// g_dsp.reg_stack_ptrs[reg_index]--;
// g_dsp.reg_stack_ptrs[reg_index] &= DSP_STACK_MASK;
SUB(8, R(AL), Imm8(1));
AND(8, R(AL), Imm8(DSP_STACK_MASK));
MOV(8, M_SDSP_reg_stack_ptr(reg_index), R(AL));
MOV(8, M_SDSP_reg_stack_ptrs(reg_index), R(AL));
}
void DSPEmitter::dsp_reg_store_stack(StackRegister stack_reg, Gen::X64Reg host_sreg)