Improve code and clarify parameters to ABI_Push/PopRegistersAndAdjustStack.
- Factor common work into a helper function. - Replace confusingly named "noProlog" with "rsp_alignment". Now that x86 is not supported, we can just specify it explicitly as 8 for clarity. - Add the option to include more frame size, which I'll need later. - Revert a change by magumagu in March which replaced MOVAPD with MOVUPD on account of 32-bit Windows, since it's no longer supported. True, apparently recent processors don't execute the former any faster if the pointer is, in fact, aligned, but there's no point using MOVUPD for something that's guaranteed to be aligned... (I discovered that GenFrsqrte and GenFres were incorrectly passing false to noProlog - they were, in fact, functions without prologs, the original meaning of the parameter - which caused the previous change to break. This is now fixed.)
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@@ -495,9 +495,9 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
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js.fifoBytesThisBlock -= 32;
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MOV(32, PPCSTATE(pc), Imm32(jit->js.compilerPC)); // Helps external systems know which instruction triggered the write
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u32 registersInUse = CallerSavedRegistersInUse();
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ABI_PushRegistersAndAdjustStack(registersInUse, false);
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ABI_PushRegistersAndAdjustStack(registersInUse, 0);
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ABI_CallFunction((void *)&GPFifo::CheckGatherPipe);
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ABI_PopRegistersAndAdjustStack(registersInUse, false);
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ABI_PopRegistersAndAdjustStack(registersInUse, 0);
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}
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u32 function = HLE::GetFunctionIndex(ops[i].address);
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@@ -116,11 +116,11 @@ void Jit64::lXXx(UGeckoInstruction inst)
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FixupBranch noIdle = J_CC(CC_NZ);
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u32 registersInUse = CallerSavedRegistersInUse();
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ABI_PushRegistersAndAdjustStack(registersInUse, false);
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ABI_PushRegistersAndAdjustStack(registersInUse, 0);
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ABI_CallFunctionC((void *)&PowerPC::OnIdle, PowerPC::ppcState.gpr[a] + (s32)(s16)inst.SIMM_16);
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ABI_PopRegistersAndAdjustStack(registersInUse, false);
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ABI_PopRegistersAndAdjustStack(registersInUse, 0);
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// ! we must continue executing of the loop after exception handling, maybe there is still 0 in r0
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//MOV(32, PPCSTATE(pc), Imm32(js.compilerPC));
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@@ -285,9 +285,9 @@ void Jit64::dcbz(UGeckoInstruction inst)
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// supposedly there are, at least for some MMU titles. Let's be careful and support it to be sure.
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MOV(32, M(&PC), Imm32(jit->js.compilerPC));
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u32 registersInUse = CallerSavedRegistersInUse();
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ABI_PushRegistersAndAdjustStack(registersInUse, false);
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ABI_PushRegistersAndAdjustStack(registersInUse, 0);
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ABI_CallFunctionR((void *)&Memory::ClearCacheLine, RSCRATCH);
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ABI_PopRegistersAndAdjustStack(registersInUse, false);
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ABI_PopRegistersAndAdjustStack(registersInUse, 0);
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FixupBranch exit = J();
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SetJumpTarget(fast);
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@@ -374,7 +374,7 @@ void Jit64::stX(UGeckoInstruction inst)
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MOV(32, PPCSTATE(pc), Imm32(jit->js.compilerPC));
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u32 registersInUse = CallerSavedRegistersInUse();
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ABI_PushRegistersAndAdjustStack(registersInUse, false);
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ABI_PushRegistersAndAdjustStack(registersInUse, 0);
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switch (accessSize)
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{
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case 32:
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@@ -387,7 +387,7 @@ void Jit64::stX(UGeckoInstruction inst)
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ABI_CallFunctionAC((void *)&Memory::Write_U8, gpr.R(s), addr);
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break;
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}
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ABI_PopRegistersAndAdjustStack(registersInUse, false);
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ABI_PopRegistersAndAdjustStack(registersInUse, 0);
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if (update)
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gpr.SetImmediate32(a, addr);
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return;
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@@ -110,9 +110,9 @@ void CommonAsmRoutines::GenFrsqrte()
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SetJumpTarget(complex1);
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SetJumpTarget(complex2);
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SetJumpTarget(complex3);
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ABI_PushRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, false);
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ABI_PushRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, 8);
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ABI_CallFunction((void *)&MathUtil::ApproximateReciprocalSquareRoot);
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ABI_PopRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, false);
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ABI_PopRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, 8);
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RET();
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}
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@@ -169,9 +169,9 @@ void CommonAsmRoutines::GenFres()
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SetJumpTarget(complex1);
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SetJumpTarget(complex2);
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ABI_PushRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, false);
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ABI_PushRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, 8);
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ABI_CallFunction((void *)&MathUtil::ApproximateReciprocal);
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ABI_PopRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, false);
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ABI_PopRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, 8);
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RET();
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}
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@@ -258,9 +258,10 @@ void CommonAsmRoutines::GenQuantizedStores()
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SwapAndStore(64, MComplex(RMEM, RSCRATCH_EXTRA, SCALE_1, 0), RSCRATCH);
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FixupBranch skip_complex = J(true);
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SetJumpTarget(too_complex);
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ABI_PushRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, true);
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// RSP alignment here is 8 due to the call.
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ABI_PushRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, 8);
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ABI_CallFunctionR((void *)&WriteDual32, RSCRATCH_EXTRA);
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ABI_PopRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, true);
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ABI_PopRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, 8);
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SetJumpTarget(skip_complex);
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RET();
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@@ -56,10 +56,8 @@ const u8 *TrampolineCache::GetReadTrampoline(const InstructionInfo &info, u32 re
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X64Reg dataReg = (X64Reg)info.regOperandReg;
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// It's a read. Easy.
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// It ought to be necessary to align the stack here. Since it seems to not
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// affect anybody, I'm not going to add it just to be completely safe about
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// performance.
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ABI_PushRegistersAndAdjustStack(registersInUse, true);
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// RSP alignment here is 8 due to the call.
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ABI_PushRegistersAndAdjustStack(registersInUse, 8);
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if (addrReg != ABI_PARAM1)
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MOV(32, R(ABI_PARAM1), R((X64Reg)addrReg));
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@@ -91,7 +89,7 @@ const u8 *TrampolineCache::GetReadTrampoline(const InstructionInfo &info, u32 re
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MOV(32, R(dataReg), R(ABI_RETURN));
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}
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ABI_PopRegistersAndAdjustStack(registersInUse, true);
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ABI_PopRegistersAndAdjustStack(registersInUse, 8);
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RET();
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return trampoline;
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}
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@@ -115,7 +113,7 @@ const u8 *TrampolineCache::GetWriteTrampoline(const InstructionInfo &info, u32 r
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// PC is used by memory watchpoints (if enabled) or to print accurate PC locations in debug logs
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MOV(32, PPCSTATE(pc), Imm32(pc));
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ABI_PushRegistersAndAdjustStack(registersInUse, true);
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ABI_PushRegistersAndAdjustStack(registersInUse, 8);
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MOVTwo(64, ABI_PARAM1, dataReg, ABI_PARAM2, addrReg, ABI_PARAM3);
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@@ -140,7 +138,7 @@ const u8 *TrampolineCache::GetWriteTrampoline(const InstructionInfo &info, u32 r
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break;
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}
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ABI_PopRegistersAndAdjustStack(registersInUse, true);
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ABI_PopRegistersAndAdjustStack(registersInUse, 8);
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RET();
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return trampoline;
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@@ -204,9 +204,9 @@ private:
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void CallLambda(int sbits, const std::function<T(u32)>* lambda)
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{
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m_code->ABI_PushRegistersAndAdjustStack(m_registers_in_use, false);
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m_code->ABI_PushRegistersAndAdjustStack(m_registers_in_use, 0);
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m_code->ABI_CallLambdaC(lambda, m_address);
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m_code->ABI_PopRegistersAndAdjustStack(m_registers_in_use, false);
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m_code->ABI_PopRegistersAndAdjustStack(m_registers_in_use, 0);
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MoveOpArgToReg(sbits, R(ABI_RETURN));
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}
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@@ -305,7 +305,7 @@ void EmuCodeBlock::SafeLoadToReg(X64Reg reg_value, const Gen::OpArg & opAddress,
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}
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else
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{
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ABI_PushRegistersAndAdjustStack(registersInUse, false);
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ABI_PushRegistersAndAdjustStack(registersInUse, 0);
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switch (accessSize)
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{
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case 64: ABI_CallFunctionC((void *)&Memory::Read_U64, address); break;
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@@ -313,7 +313,7 @@ void EmuCodeBlock::SafeLoadToReg(X64Reg reg_value, const Gen::OpArg & opAddress,
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case 16: ABI_CallFunctionC((void *)&Memory::Read_U16_ZX, address); break;
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case 8: ABI_CallFunctionC((void *)&Memory::Read_U8_ZX, address); break;
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}
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ABI_PopRegistersAndAdjustStack(registersInUse, false);
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ABI_PopRegistersAndAdjustStack(registersInUse, 0);
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MEMCHECK_START
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@@ -350,7 +350,7 @@ void EmuCodeBlock::SafeLoadToReg(X64Reg reg_value, const Gen::OpArg & opAddress,
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FixupBranch fast = J_CC(CC_Z, true);
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ABI_PushRegistersAndAdjustStack(registersInUse, false);
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ABI_PushRegistersAndAdjustStack(registersInUse, 0);
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switch (accessSize)
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{
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case 64:
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@@ -366,7 +366,7 @@ void EmuCodeBlock::SafeLoadToReg(X64Reg reg_value, const Gen::OpArg & opAddress,
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ABI_CallFunctionA((void *)&Memory::Read_U8_ZX, addr_loc);
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break;
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}
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ABI_PopRegistersAndAdjustStack(registersInUse, false);
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ABI_PopRegistersAndAdjustStack(registersInUse, 0);
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MEMCHECK_START
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@@ -470,9 +470,9 @@ void EmuCodeBlock::SafeWriteRegToReg(X64Reg reg_value, X64Reg reg_addr, int acce
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FixupBranch fast = J_CC(CC_Z, true);
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// PC is used by memory watchpoints (if enabled) or to print accurate PC locations in debug logs
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MOV(32, PPCSTATE(pc), Imm32(jit->js.compilerPC));
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bool noProlog = (0 != (flags & SAFE_LOADSTORE_NO_PROLOG));
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size_t rsp_alignment = (flags & SAFE_LOADSTORE_NO_PROLOG) ? 8 : 0;
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bool swap = !(flags & SAFE_LOADSTORE_NO_SWAP);
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ABI_PushRegistersAndAdjustStack(registersInUse, noProlog);
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ABI_PushRegistersAndAdjustStack(registersInUse, rsp_alignment);
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switch (accessSize)
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{
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case 64:
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@@ -488,7 +488,7 @@ void EmuCodeBlock::SafeWriteRegToReg(X64Reg reg_value, X64Reg reg_addr, int acce
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ABI_CallFunctionRR((void *)&Memory::Write_U8, reg_value, reg_addr, false);
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break;
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}
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ABI_PopRegistersAndAdjustStack(registersInUse, noProlog);
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ABI_PopRegistersAndAdjustStack(registersInUse, rsp_alignment);
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FixupBranch exit = J();
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SetJumpTarget(fast);
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UnsafeWriteRegToReg(reg_value, reg_addr, accessSize, 0, swap);
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