DSPTables: Separate interpreter and JIT functions from main info table
This is one of the last things that needed to be done in order to finally separate the x86-64-specific code from the rest of the common DSP code. This splits the tables up similar to how it's currently done for the PowerPC CPU tables. Now, the tables are split up and within their own relevant source files, so the main table within the common DSP code acts as the "info" table that provides specifics about a particular instruction, while the other tables contain the actual instruction. With this out of the way, all that's left is to make a general base for the emitters and we can then replace the x64 JIT pointer in DSPCore with it, getting all x64 out of the common code once and for all. While shuffling all the code around, the removal of the DSPEmitter includes in some places uncovered indirect inclusions, so this also fixes those as well.
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@@ -0,0 +1,389 @@
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// Copyright 2018 Dolphin Emulator Project
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// Licensed under GPLv2+
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// Refer to the license.txt file included.
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#include "Core/DSP/Interpreter/DSPIntTables.h"
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#include <algorithm>
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#include <array>
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#include "Common/CommonTypes.h"
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#include "Core/DSP/Interpreter/DSPIntExtOps.h"
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#include "Core/DSP/Interpreter/DSPInterpreter.h"
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namespace DSP::Interpreter
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{
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struct InterpreterOpInfo
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{
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u16 opcode;
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u16 mask;
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InterpreterFunction function;
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};
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// clang-format off
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constexpr std::array<InterpreterOpInfo, 214> s_opcodes
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{{
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{0x0000, 0xfffc, nop},
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{0x0004, 0xfffc, dar},
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{0x0008, 0xfffc, iar},
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{0x000c, 0xfffc, subarn},
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{0x0010, 0xfff0, addarn},
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{0x0021, 0xffff, halt},
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{0x02d0, 0xffff, ret},
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{0x02d1, 0xffff, ret},
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{0x02d2, 0xffff, ret},
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{0x02d3, 0xffff, ret},
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{0x02d4, 0xffff, ret},
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{0x02d5, 0xffff, ret},
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{0x02d6, 0xffff, ret},
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{0x02d7, 0xffff, ret},
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{0x02d8, 0xffff, ret},
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{0x02d9, 0xffff, ret},
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{0x02da, 0xffff, ret},
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{0x02db, 0xffff, ret},
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{0x02dc, 0xffff, ret},
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{0x02dd, 0xffff, ret},
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{0x02de, 0xffff, ret},
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{0x02df, 0xffff, ret},
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{0x02ff, 0xffff, rti},
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{0x02b0, 0xffff, call},
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{0x02b1, 0xffff, call},
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{0x02b2, 0xffff, call},
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{0x02b3, 0xffff, call},
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{0x02b4, 0xffff, call},
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{0x02b5, 0xffff, call},
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{0x02b6, 0xffff, call},
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{0x02b7, 0xffff, call},
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{0x02b8, 0xffff, call},
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{0x02b9, 0xffff, call},
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{0x02ba, 0xffff, call},
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{0x02bb, 0xffff, call},
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{0x02bc, 0xffff, call},
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{0x02bd, 0xffff, call},
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{0x02be, 0xffff, call},
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{0x02bf, 0xffff, call},
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{0x0270, 0xffff, ifcc},
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{0x0271, 0xffff, ifcc},
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{0x0272, 0xffff, ifcc},
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{0x0273, 0xffff, ifcc},
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{0x0274, 0xffff, ifcc},
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{0x0275, 0xffff, ifcc},
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{0x0276, 0xffff, ifcc},
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{0x0277, 0xffff, ifcc},
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{0x0278, 0xffff, ifcc},
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{0x0279, 0xffff, ifcc},
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{0x027a, 0xffff, ifcc},
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{0x027b, 0xffff, ifcc},
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{0x027c, 0xffff, ifcc},
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{0x027d, 0xffff, ifcc},
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{0x027e, 0xffff, ifcc},
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{0x027f, 0xffff, ifcc},
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{0x0290, 0xffff, jcc},
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{0x0291, 0xffff, jcc},
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{0x0292, 0xffff, jcc},
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{0x0293, 0xffff, jcc},
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{0x0294, 0xffff, jcc},
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{0x0295, 0xffff, jcc},
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{0x0296, 0xffff, jcc},
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{0x0297, 0xffff, jcc},
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{0x0298, 0xffff, jcc},
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{0x0299, 0xffff, jcc},
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{0x029a, 0xffff, jcc},
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{0x029b, 0xffff, jcc},
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{0x029c, 0xffff, jcc},
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{0x029d, 0xffff, jcc},
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{0x029e, 0xffff, jcc},
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{0x029f, 0xffff, jcc},
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{0x1700, 0xff1f, jmprcc},
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{0x1701, 0xff1f, jmprcc},
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{0x1702, 0xff1f, jmprcc},
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{0x1703, 0xff1f, jmprcc},
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{0x1704, 0xff1f, jmprcc},
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{0x1705, 0xff1f, jmprcc},
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{0x1706, 0xff1f, jmprcc},
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{0x1707, 0xff1f, jmprcc},
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{0x1708, 0xff1f, jmprcc},
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{0x1709, 0xff1f, jmprcc},
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{0x170a, 0xff1f, jmprcc},
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{0x170b, 0xff1f, jmprcc},
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{0x170c, 0xff1f, jmprcc},
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{0x170d, 0xff1f, jmprcc},
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{0x170e, 0xff1f, jmprcc},
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{0x170f, 0xff1f, jmprcc},
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{0x1710, 0xff1f, callr},
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{0x1711, 0xff1f, callr},
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{0x1712, 0xff1f, callr},
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{0x1713, 0xff1f, callr},
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{0x1714, 0xff1f, callr},
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{0x1715, 0xff1f, callr},
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{0x1716, 0xff1f, callr},
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{0x1717, 0xff1f, callr},
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{0x1718, 0xff1f, callr},
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{0x1719, 0xff1f, callr},
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{0x171a, 0xff1f, callr},
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{0x171b, 0xff1f, callr},
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{0x171c, 0xff1f, callr},
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{0x171d, 0xff1f, callr},
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{0x171e, 0xff1f, callr},
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{0x171f, 0xff1f, callr},
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{0x1200, 0xff00, sbclr},
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{0x1300, 0xff00, sbset},
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{0x1400, 0xfec0, lsl},
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{0x1440, 0xfec0, lsr},
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{0x1480, 0xfec0, asl},
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{0x14c0, 0xfec0, asr},
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// these two were discovered by ector
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{0x02ca, 0xffff, lsrn},
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{0x02cb, 0xffff, asrn},
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{0x0080, 0xffe0, lri},
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{0x00c0, 0xffe0, lr},
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{0x00e0, 0xffe0, sr},
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{0x1c00, 0xfc00, mrr},
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{0x1600, 0xff00, si},
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{0x0400, 0xfe00, addis},
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{0x0600, 0xfe00, cmpis},
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{0x0800, 0xf800, lris},
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{0x0200, 0xfeff, addi},
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{0x0220, 0xfeff, xori},
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{0x0240, 0xfeff, andi},
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{0x0260, 0xfeff, ori},
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{0x0280, 0xfeff, cmpi},
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{0x02a0, 0xfeff, andf},
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{0x02c0, 0xfeff, andcf},
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{0x0210, 0xfefc, ilrr},
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{0x0214, 0xfefc, ilrrd},
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{0x0218, 0xfefc, ilrri},
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{0x021c, 0xfefc, ilrrn},
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// LOOPS
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{0x0040, 0xffe0, loop},
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{0x0060, 0xffe0, bloop},
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{0x1000, 0xff00, loopi},
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{0x1100, 0xff00, bloopi},
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// load and store value pointed by indexing reg and increment; LRR/SRR variants
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{0x1800, 0xff80, lrr},
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{0x1880, 0xff80, lrrd},
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{0x1900, 0xff80, lrri},
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{0x1980, 0xff80, lrrn},
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{0x1a00, 0xff80, srr},
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{0x1a80, 0xff80, srrd},
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{0x1b00, 0xff80, srri},
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{0x1b80, 0xff80, srrn},
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// 2
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{0x2000, 0xf800, lrs},
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{0x2800, 0xf800, srs},
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// opcodes that can be extended
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// 3 - main opcode defined by 9 bits, extension defined by last 7 bits!!
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{0x3000, 0xfc80, xorr},
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{0x3400, 0xfc80, andr},
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{0x3800, 0xfc80, orr},
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{0x3c00, 0xfe80, andc},
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{0x3e00, 0xfe80, orc},
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{0x3080, 0xfe80, xorc},
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{0x3280, 0xfe80, notc},
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{0x3480, 0xfc80, lsrnrx},
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{0x3880, 0xfc80, asrnrx},
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{0x3c80, 0xfe80, lsrnr},
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{0x3e80, 0xfe80, asrnr},
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// 4
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{0x4000, 0xf800, addr},
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{0x4800, 0xfc00, addax},
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{0x4c00, 0xfe00, add},
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{0x4e00, 0xfe00, addp},
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// 5
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{0x5000, 0xf800, subr},
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{0x5800, 0xfc00, subax},
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{0x5c00, 0xfe00, sub},
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{0x5e00, 0xfe00, subp},
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// 6
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{0x6000, 0xf800, movr},
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{0x6800, 0xfc00, movax},
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{0x6c00, 0xfe00, mov},
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{0x6e00, 0xfe00, movp},
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// 7
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{0x7000, 0xfc00, addaxl},
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{0x7400, 0xfe00, incm},
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{0x7600, 0xfe00, inc},
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{0x7800, 0xfe00, decm},
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{0x7a00, 0xfe00, dec},
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{0x7c00, 0xfe00, neg},
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{0x7e00, 0xfe00, movnp},
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// 8
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{0x8000, 0xf700, nx},
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{0x8100, 0xf700, clr},
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{0x8200, 0xff00, cmp},
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{0x8300, 0xff00, mulaxh},
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{0x8400, 0xff00, clrp},
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{0x8500, 0xff00, tstprod},
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{0x8600, 0xfe00, tstaxh},
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{0x8a00, 0xff00, srbith},
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{0x8b00, 0xff00, srbith},
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{0x8c00, 0xff00, srbith},
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{0x8d00, 0xff00, srbith},
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{0x8e00, 0xff00, srbith},
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{0x8f00, 0xff00, srbith},
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// 9
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{0x9000, 0xf700, mul},
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{0x9100, 0xf700, asr16},
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{0x9200, 0xf600, mulmvz},
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{0x9400, 0xf600, mulac},
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{0x9600, 0xf600, mulmv},
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// A-B
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{0xa000, 0xe700, mulx},
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{0xa100, 0xf700, abs},
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{0xa200, 0xe600, mulxmvz},
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{0xa400, 0xe600, mulxac},
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{0xa600, 0xe600, mulxmv},
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{0xb100, 0xf700, tst},
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// C-D
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{0xc000, 0xe700, mulc},
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{0xc100, 0xe700, cmpar},
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{0xc200, 0xe600, mulcmvz},
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{0xc400, 0xe600, mulcac},
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{0xc600, 0xe600, mulcmv},
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// E
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{0xe000, 0xfc00, maddx},
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{0xe400, 0xfc00, msubx},
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{0xe800, 0xfc00, maddc},
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{0xec00, 0xfc00, msubc},
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// F
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{0xf000, 0xfe00, lsl16},
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{0xf200, 0xfe00, madd},
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{0xf400, 0xfe00, lsr16},
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{0xf600, 0xfe00, msub},
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{0xf800, 0xfc00, addpaxz},
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{0xfc00, 0xfe00, clrl},
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{0xfe00, 0xfe00, movpz},
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}};
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constexpr std::array<InterpreterOpInfo, 25> s_opcodes_ext
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{{
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{0x0000, 0x00fc, Ext::nop},
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{0x0004, 0x00fc, Ext::dr},
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{0x0008, 0x00fc, Ext::ir},
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{0x000c, 0x00fc, Ext::nr},
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{0x0010, 0x00f0, Ext::mv},
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{0x0020, 0x00e4, Ext::s},
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{0x0024, 0x00e4, Ext::sn},
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{0x0040, 0x00c4, Ext::l},
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{0x0044, 0x00c4, Ext::ln},
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{0x0080, 0x00ce, Ext::ls},
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{0x0082, 0x00ce, Ext::sl},
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{0x0084, 0x00ce, Ext::lsn},
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{0x0086, 0x00ce, Ext::sln},
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{0x0088, 0x00ce, Ext::lsm},
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{0x008a, 0x00ce, Ext::slm},
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{0x008c, 0x00ce, Ext::lsnm},
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{0x008e, 0x00ce, Ext::slnm},
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{0x00c3, 0x00cf, Ext::ldax},
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{0x00c7, 0x00cf, Ext::ldaxn},
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{0x00cb, 0x00cf, Ext::ldaxm},
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{0x00cf, 0x00cf, Ext::ldaxnm},
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{0x00c0, 0x00cc, Ext::ld},
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{0x00c4, 0x00cc, Ext::ldn},
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{0x00c8, 0x00cc, Ext::ldm},
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{0x00cc, 0x00cc, Ext::ldnm},
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}};
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// clang-format on
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namespace
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{
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std::array<InterpreterFunction, 65536> s_op_table;
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std::array<InterpreterFunction, 256> s_ext_op_table;
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bool s_tables_initialized = false;
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template <size_t N>
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auto FindByOpcode(UDSPInstruction opcode, const std::array<InterpreterOpInfo, N>& data)
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{
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return std::find_if(data.cbegin(), data.cend(),
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[opcode](const auto& info) { return (opcode & info.mask) == info.opcode; });
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}
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} // Anonymous namespace
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InterpreterFunction GetOp(UDSPInstruction inst)
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{
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return s_op_table[inst];
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}
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InterpreterFunction GetExtOp(UDSPInstruction inst)
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{
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const bool has_seven_bit_extension = (inst >> 12) == 0x3;
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if (has_seven_bit_extension)
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return s_ext_op_table[inst & 0x7F];
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return s_ext_op_table[inst & 0xFF];
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}
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void InitInstructionTables()
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{
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if (s_tables_initialized)
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return;
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// ext op table
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for (size_t i = 0; i < s_ext_op_table.size(); i++)
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{
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s_ext_op_table[i] = nop;
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const auto iter = FindByOpcode(static_cast<UDSPInstruction>(i), s_opcodes_ext);
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if (iter == s_opcodes_ext.cend())
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continue;
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s_ext_op_table[i] = iter->function;
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}
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// op table
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for (size_t i = 0; i < s_op_table.size(); i++)
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{
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s_op_table[i] = nop;
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const auto iter = FindByOpcode(static_cast<UDSPInstruction>(i), s_opcodes);
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if (iter == s_opcodes.cend())
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continue;
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s_op_table[i] = iter->function;
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}
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s_tables_initialized = true;
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}
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} // namespace DSP::Interpreter
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@@ -0,0 +1,16 @@
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// Copyright 2018 Dolphin Emulator Project
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// Licensed under GPLv2+
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// Refer to the license.txt file included.
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#pragma once
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#include "Core/DSP/DSPCommon.h"
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namespace DSP::Interpreter
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{
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using InterpreterFunction = void (*)(UDSPInstruction);
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InterpreterFunction GetOp(UDSPInstruction inst);
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InterpreterFunction GetExtOp(UDSPInstruction inst);
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void InitInstructionTables();
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} // namespace DSP::Interpreter
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@@ -12,6 +12,7 @@
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#include "Core/DSP/DSPCore.h"
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#include "Core/DSP/DSPMemoryMap.h"
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#include "Core/DSP/DSPTables.h"
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#include "Core/DSP/Interpreter/DSPIntTables.h"
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namespace DSP
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{
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@@ -25,10 +26,10 @@ void ExecuteInstruction(const UDSPInstruction inst)
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if (opcode_template->extended)
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{
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GetExtOpTemplate(inst)->intFunc(inst);
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GetExtOp(inst)(inst);
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}
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opcode_template->intFunc(inst);
|
||||
GetOp(inst)(inst);
|
||||
|
||||
if (opcode_template->extended)
|
||||
{
|
||||
|
||||
Reference in new issue
Block a user