Lots of various changes. CPU detect fix. Maybe a minor speed increase. CPU bugs remain.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@180 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
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29102ecbc6
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27 files changed
+400
-192
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@@ -26,6 +26,7 @@
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#include "Console.h"
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#include "Core.h"
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#include "CPUDetect.h"
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#include "CoreTiming.h"
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#include "Boot/Boot.h"
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#include "PatchEngine.h"
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@@ -140,7 +141,9 @@ bool Init(const SCoreStartupParameter _CoreParameter)
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// all right ... here we go
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Host_SetWaitCursor(false);
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DisplayMessage("Emulation started.", 3000);
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DisplayMessage(cpu_info.CPUBrandString, 3000);
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DisplayMessage(_CoreParameter.m_strFilename, 3000);
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//RegisterPanicAlertHandler(PanicAlertToVideo);
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@@ -16,6 +16,7 @@
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// http://code.google.com/p/dolphin-emu/
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#include "Common.h"
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#include "Thunk.h"
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#include "../Core.h"
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#include "HW.h"
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#include "../PowerPC/PowerPC.h"
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@@ -42,6 +43,7 @@ namespace HW
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{
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void Init()
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{
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Thunk_Init(); // not really hw, but this way we know it's inited first :P
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// Init the whole Hardware
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PixelEngine::Init();
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CommandProcessor::Init();
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@@ -72,5 +74,6 @@ namespace HW
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WII_IPC_HLE_Interface::Shutdown();
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WII_IPCInterface::Shutdown();
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Thunk_Shutdown();
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}
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}
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@@ -1054,10 +1054,14 @@ void SDRUpdated()
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u32 CheckDTLB(u32 _Address, XCheckTLBFlag _Flag)
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{
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PanicAlert("TLB: %s unknown memory (0x%08x)\n"
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"This is either the game crashing randomly, or a TLB write."
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"Several games uses the TLB to map memory. This\n"
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"function is not support in dolphin. Cheers!",
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"function is not supported in Dolphin. "
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"Also, unfortunately there is no way to recover from this error,"
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"so Dolphin will now exit abruptly. Sorry!",
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_Flag == FLAG_WRITE ? "Write to" : "Read from", _Address);
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exit(0);
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u32 sr = PowerPC::ppcState.sr[EA_SR(_Address)];
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u32 offset = EA_Offset(_Address); // 12 bit
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@@ -132,7 +132,7 @@ void CPeripheralInterface::Write32(const u32 _uValue, const u32 _iAddress)
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if ((_uValue != 0x80000001) && (_uValue != 0x80000005)) // DVDLowReset
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{
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TCHAR szTemp[256];
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sprintf(szTemp, "Unknown write to PI_RESET_CODE (%08x)", _uValue);
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sprintf(szTemp, "Game wants to reset the machine. PI_RESET_CODE: (%08x)", _uValue);
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PanicAlert(szTemp);
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}
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}
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@@ -145,7 +145,7 @@ void CInterpreter::lmw(UGeckoInstruction _inst)
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u32 TempReg = Memory::Read_U32(uAddress);
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if (PowerPC::ppcState.Exceptions & EXCEPTION_DSI)
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{
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PanicAlert("DSI exception in lmv. This is very bad.");
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PanicAlert("DSI exception in lmv.");
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return;
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}
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@@ -500,9 +500,9 @@ void CInterpreter::lswi(UGeckoInstruction _inst)
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u32 n;
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if (_inst.NB == 0)
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n=32;
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n = 32;
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else
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n=_inst.NB;
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n = _inst.NB;
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int r = _inst.RD - 1;
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int i = 0;
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@@ -511,22 +511,22 @@ void CInterpreter::lswi(UGeckoInstruction _inst)
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if (i==0)
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{
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r++;
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r&=31;
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r &= 31;
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m_GPR[r] = 0;
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}
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u32 TempValue = Memory::Read_U8(EA) << (24-i);
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u32 TempValue = Memory::Read_U8(EA) << (24 - i);
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if (PowerPC::ppcState.Exceptions & EXCEPTION_DSI)
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{
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PanicAlert("DSI exception in lsw. This is very bad.");
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PanicAlert("DSI exception in lsw.");
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return;
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}
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m_GPR[r] |= TempValue;
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i+=8;
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if (i==32)
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i=0;
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i += 8;
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if (i == 32)
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i = 0;
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EA++;
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n--;
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}
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@@ -546,26 +546,26 @@ void CInterpreter::stswi(UGeckoInstruction _inst)
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u32 n;
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if (_inst.NB == 0)
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n=32;
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n = 32;
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else
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n=_inst.NB;
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n = _inst.NB;
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int r = _inst.RS - 1;
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int i = 0;
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while (n>0)
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while (n > 0)
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{
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if (i==0)
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if (i == 0)
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{
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r++;
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r&=31;
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r &= 31;
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}
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Memory::Write_U8((m_GPR[r] >> (24-i)) & 0xFF, EA);
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Memory::Write_U8((m_GPR[r] >> (24 - i)) & 0xFF, EA);
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if (PowerPC::ppcState.Exceptions & EXCEPTION_DSI)
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return;
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i+=8;
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if (i==32)
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i=0;
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i += 8;
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if (i == 32)
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i = 0;
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EA++;
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n--;
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}
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@@ -220,7 +220,7 @@ subfex
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// Evil
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namespace CPUCompare
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{
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extern u32 m_BlockStart;
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extern u32 m_BlockStart;
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}
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@@ -231,9 +231,8 @@ namespace Jit64
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void WriteCallInterpreter(UGeckoInstruction _inst)
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{
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gpr.Flush(js.op);
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if (PPCTables::UsesFPU(_inst))
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fpr.Flush(js.op);
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gpr.Flush(FLUSH_ALL);
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fpr.Flush(FLUSH_ALL);
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if (js.isLastInstruction)
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{
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MOV(32, M(&PC), Imm32(js.compilerPC));
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@@ -250,7 +249,8 @@ namespace Jit64
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void HLEFunction(UGeckoInstruction _inst)
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{
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FlushRegCaches();
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gpr.Flush(FLUSH_ALL);
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fpr.Flush(FLUSH_ALL);
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ABI_CallFunctionCC((void*)&HLE::Execute, js.compilerPC, _inst.hex);
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MOV(32, R(EAX), M(&NPC));
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WriteExitDestInEAX(0);
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@@ -24,6 +24,7 @@
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#include "x64Emitter.h"
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#include "ABI.h"
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#include "Thunk.h"
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#include "x64Analyzer.h"
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#include "StringUtil.h"
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@@ -109,7 +110,7 @@ void BackPatch(u8 *codePtr, int accessType, u32 emAddress)
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// break;
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case 4:
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// THIS FUNCTION CANNOT TOUCH FLOATING POINT REGISTERS.
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CALL((void *)&Memory::Read_U32);
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CALL(ProtectFunction((void *)&Memory::Read_U32, 1));
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break;
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default:
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BackPatchError(StringFromFormat("We don't handle the size %i yet in backpatch", info.operandSize), codePtr, emAddress);
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@@ -259,12 +259,12 @@ namespace Jit64
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{
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#ifdef _M_X64
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#ifdef _WIN32
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RSI, RDI, R12, R13, R14, R8, R9, RDX, R10, R11 //, RCX
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RSI, RDI, R12, R13, R14, R8, R9, R10, R11 //, RCX
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#else
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R12, R13, R14, R8, R9, R10, R11, RSI, RDI //, RCX
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#endif
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#elif _M_IX86
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ESI, EDI, EBX, EBP, EDX
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ESI, EDI, EBX, EBP, EDX, ECX,
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#endif
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};
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count = sizeof(allocationOrder) / sizeof(const int);
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@@ -412,10 +412,7 @@ namespace Jit64
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if (regs[i].location.IsSimpleReg())
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{
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X64Reg xr = RX(i);
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if (mode != FLUSH_VOLATILE || IsXRegVolatile(xr))
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{
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StoreFromX64(i);
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}
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StoreFromX64(i);
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xregs[xr].dirty = false;
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}
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else if (regs[i].location.IsImm())
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@@ -25,7 +25,6 @@ namespace Jit64
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using namespace Gen;
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enum FlushMode
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{
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FLUSH_VOLATILE,
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// FLUSH_ALLNONSTATIC,
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FLUSH_ALL
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};
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@@ -48,7 +48,7 @@ namespace Jit64
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void rfi(UGeckoInstruction _inst)
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{
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FlushRegCaches();
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//Bits SRR1[0,5-9,16�23, 25�27, 30�31] are placed into the corresponding bits of the MSR.
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//Bits SRR1[0, 5-9, 16-23, 25-27, 30-31] are placed into the corresponding bits of the MSR.
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//MSR[13] is set to 0.
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const int mask = 0x87C0FF73;
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// MSR = (MSR & ~mask) | (SRR1 & mask);
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@@ -105,7 +105,7 @@ namespace Jit64
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const bool only_counter_check = ((inst.BO >> 4) & 1);
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const bool only_condition_check = ((inst.BO >> 2) & 1);
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if (only_condition_check && only_counter_check)
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PanicAlert("Stupid bcx encountered. Likely bad or corrupt code.");
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PanicAlert("Bizarre bcx encountered. Likely bad or corrupt code.");
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bool doFullTest = (inst.BO & 16) == 0 && (inst.BO & 4) == 0;
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bool ctrDecremented = false;
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@@ -182,7 +182,7 @@ namespace Jit64
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bool fastway = true;
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if((inst.BO & 16) == 0)
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if ((inst.BO & 16) == 0)
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{
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PanicAlert("Bizarro bcctrx %08x, not supported.", inst.hex);
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_assert_msg_(DYNA_REC, 0, "Bizarro bcctrx");
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@@ -27,6 +27,7 @@
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#ifdef _WIN32
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#define INSTRUCTION_START
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//#define INSTRUCTION_START Default(inst); return;
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#else
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#define INSTRUCTION_START Default(inst); return;
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#endif
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@@ -317,8 +317,7 @@ namespace Jit64
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{
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INSTRUCTION_START;
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int a = inst.RA, d = inst.RD;
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gpr.FlushR(ECX);
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gpr.LockX(ECX);
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gpr.FlushLockX(ECX);
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gpr.Lock(a, d);
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if (a != d)
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gpr.LoadToX64(d, false, true);
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@@ -376,8 +375,7 @@ namespace Jit64
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{
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INSTRUCTION_START;
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int a = inst.RA, d = inst.RD;
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gpr.FlushR(EDX);
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gpr.LockX(EDX);
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gpr.FlushLockX(EDX);
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gpr.Lock(a, d);
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if (d != a) {
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gpr.LoadToX64(d, false, true);
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@@ -396,8 +394,7 @@ namespace Jit64
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{
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INSTRUCTION_START;
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int a = inst.RA, b = inst.RB, d = inst.RD;
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gpr.FlushR(EDX);
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gpr.LockX(EDX);
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gpr.FlushLockX(EDX);
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gpr.Lock(a, b, d);
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if (d != a && d != b) {
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gpr.LoadToX64(d, false, true);
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@@ -420,8 +417,7 @@ namespace Jit64
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{
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INSTRUCTION_START;
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int a = inst.RA, b = inst.RB, d = inst.RD;
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gpr.FlushR(EDX);
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gpr.LockX(EDX);
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gpr.FlushLockX(EDX);
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gpr.Lock(a, b, d);
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if (d != a && d != b) {
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gpr.LoadToX64(d, false, true);
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@@ -450,8 +446,7 @@ namespace Jit64
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Default(inst); return;
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int a = inst.RA, b = inst.RB, d = inst.RD;
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gpr.FlushR(EDX);
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gpr.LockX(EDX);
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gpr.FlushLockX(EDX);
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gpr.Lock(a, b, d);
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if (d != a && d != b) {
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gpr.LoadToX64(d, false, true);
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@@ -534,8 +529,7 @@ namespace Jit64
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{
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INSTRUCTION_START;
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int a = inst.RA, b = inst.RB, d = inst.RD;
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gpr.FlushR(ECX);
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gpr.LockX(ECX);
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gpr.FlushLockX(ECX);
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gpr.Lock(a, b, d);
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if (d != a && d != b)
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gpr.LoadToX64(d, false);
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@@ -649,8 +643,7 @@ namespace Jit64
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}
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u32 mask = Helper_Mask(inst.MB, inst.ME);
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gpr.FlushR(ECX);
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gpr.LockX(ECX);
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gpr.FlushLockX(ECX);
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gpr.Lock(a, b, s);
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MOV(32, R(EAX), gpr.R(s));
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MOV(32, R(ECX), gpr.R(b));
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@@ -691,8 +684,7 @@ namespace Jit64
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int a = inst.RA;
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int b = inst.RB;
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int s = inst.RS;
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gpr.FlushR(ECX);
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gpr.LockX(ECX);
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gpr.FlushLockX(ECX);
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gpr.Lock(a, b, s);
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gpr.LoadToX64(a, a == s || a == b || s == b, true);
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MOV(32, R(ECX), gpr.R(b));
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@@ -719,8 +711,7 @@ namespace Jit64
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int a = inst.RA;
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int b = inst.RB;
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int s = inst.RS;
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gpr.FlushR(ECX);
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gpr.LockX(ECX);
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gpr.FlushLockX(ECX);
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gpr.Lock(a, b, s);
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gpr.LoadToX64(a, a == s || a == b || s == b, true);
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MOV(32, R(ECX), gpr.R(b));
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@@ -19,6 +19,7 @@
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// Should give a very noticable speed boost to paired single heavy code.
|
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|
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#include "Common.h"
|
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#include "Thunk.h"
|
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|
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#include "../PowerPC.h"
|
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#include "../../Core.h"
|
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@@ -82,9 +83,9 @@ namespace Jit64
|
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SetJumpTarget(argh);
|
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switch (accessSize)
|
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{
|
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case 32: ABI_CallFunctionR((void *)&Memory::Read_U32, reg); break;
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case 16: ABI_CallFunctionR((void *)&Memory::Read_U16, reg); break;
|
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case 8: ABI_CallFunctionR((void *)&Memory::Read_U8, reg); break;
|
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case 32: ABI_CallFunctionR(ProtectFunction((void *)&Memory::Read_U32, 1), reg); break;
|
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case 16: ABI_CallFunctionR(ProtectFunction((void *)&Memory::Read_U16, 1), reg); break;
|
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case 8: ABI_CallFunctionR(ProtectFunction((void *)&Memory::Read_U8, 1), reg); break;
|
||||
}
|
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SetJumpTarget(arg2);
|
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}
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@@ -97,9 +98,9 @@ namespace Jit64
|
||||
BSWAP(32, reg_value);
|
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#ifdef _M_IX86
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AND(32, R(reg_addr), Imm32(Memory::MEMVIEW32_MASK));
|
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MOV(accessSize, MDisp(reg_addr, (u32)Memory::base), R(reg_value));
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MOV(accessSize, MDisp(reg_addr, (u32)Memory::base + offset), R(reg_value));
|
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#else
|
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MOV(accessSize, MComplex(RBX, reg_addr, SCALE_1, 0), R(reg_value));
|
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MOV(accessSize, MComplex(RBX, reg_addr, SCALE_1, offset), R(reg_value));
|
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#endif
|
||||
}
|
||||
|
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@@ -113,17 +114,16 @@ namespace Jit64
|
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UnsafeWriteRegToReg(reg_value, reg_addr, accessSize, 0);
|
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FixupBranch arg2 = J();
|
||||
SetJumpTarget(argh);
|
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ABI_CallFunctionRR((void *)&Memory::Write_U32, ABI_PARAM1, ABI_PARAM2);
|
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ABI_CallFunctionRR(ProtectFunction((void *)&Memory::Write_U32, 2), ABI_PARAM1, ABI_PARAM2);
|
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SetJumpTarget(arg2);
|
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}
|
||||
|
||||
void lbzx(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START;
|
||||
gpr.Flush(FLUSH_VOLATILE);
|
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fpr.Flush(FLUSH_VOLATILE);
|
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int a = inst.RA, b = inst.RB, d = inst.RD;
|
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gpr.Lock(a, b, d);
|
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gpr.FlushLockX(ABI_PARAM1);
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if (b == d || a == d)
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gpr.LoadToX64(d, true, true);
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else
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@@ -134,6 +134,7 @@ namespace Jit64
|
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SafeLoadRegToEAX(ABI_PARAM1, 8, 0);
|
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MOV(32, gpr.R(d), R(EAX));
|
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gpr.UnlockAll();
|
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gpr.UnlockAllX();
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}
|
||||
|
||||
void lXz(UGeckoInstruction inst)
|
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@@ -145,7 +146,6 @@ namespace Jit64
|
||||
// TODO(ector): Make it dynamically enable/disable idle skipping where appropriate
|
||||
// Will give nice boost to dual core mode
|
||||
// if (CommandProcessor::AllowIdleSkipping() && PixelEngine::AllowIdleSkipping())
|
||||
|
||||
if (!Core::GetStartupParameter().bUseDualCore &&
|
||||
inst.OPCD == 32 &&
|
||||
(inst.hex & 0xFFFF0000) == 0x800D0000 &&
|
||||
@@ -172,7 +172,7 @@ namespace Jit64
|
||||
{
|
||||
case 32: accessSize = 32; break; //lwz
|
||||
case 40: accessSize = 16; break; //lhz
|
||||
case 34: accessSize = 8; break; //lbz
|
||||
case 34: accessSize = 8; break; //lbz
|
||||
default: _assert_msg_(DYNA_REC, 0, "lXz: invalid access size"); return;
|
||||
}
|
||||
|
||||
@@ -183,8 +183,6 @@ namespace Jit64
|
||||
if (true) {
|
||||
#endif
|
||||
// Safe and boring
|
||||
gpr.Flush(FLUSH_VOLATILE);
|
||||
fpr.Flush(FLUSH_VOLATILE);
|
||||
gpr.FlushLockX(ABI_PARAM1);
|
||||
gpr.Lock(d, a);
|
||||
MOV(32, R(ABI_PARAM1), gpr.R(a));
|
||||
@@ -221,8 +219,6 @@ namespace Jit64
|
||||
int a = inst.RA;
|
||||
s32 offset = (s32)(s16)inst.SIMM_16;
|
||||
// Safe and boring
|
||||
gpr.Flush(FLUSH_VOLATILE);
|
||||
fpr.Flush(FLUSH_VOLATILE);
|
||||
gpr.FlushLockX(ABI_PARAM1);
|
||||
gpr.Lock(d, a);
|
||||
MOV(32, R(ABI_PARAM1), gpr.R(a));
|
||||
@@ -272,8 +268,6 @@ namespace Jit64
|
||||
s32 offset = (s32)(s16)inst.SIMM_16;
|
||||
if (a || update)
|
||||
{
|
||||
gpr.Flush(FLUSH_VOLATILE);
|
||||
fpr.Flush(FLUSH_VOLATILE);
|
||||
int accessSize;
|
||||
switch (inst.OPCD & ~1)
|
||||
{
|
||||
@@ -358,6 +352,7 @@ namespace Jit64
|
||||
ADD(32, R(ABI_PARAM2), Imm32((u32)offset));
|
||||
if (update && offset)
|
||||
{
|
||||
gpr.LoadToX64(a, true, true);
|
||||
MOV(32, gpr.R(a), R(ABI_PARAM2));
|
||||
}
|
||||
TEST(32, R(ABI_PARAM2), Imm32(0x0C000000));
|
||||
@@ -380,9 +375,9 @@ namespace Jit64
|
||||
SetJumpTarget(argh);
|
||||
switch (accessSize)
|
||||
{
|
||||
case 32: ABI_CallFunctionRR((void *)&Memory::Write_U32, ABI_PARAM1, ABI_PARAM2); break;
|
||||
case 16: ABI_CallFunctionRR((void *)&Memory::Write_U16, ABI_PARAM1, ABI_PARAM2); break;
|
||||
case 8: ABI_CallFunctionRR((void *)&Memory::Write_U8, ABI_PARAM1, ABI_PARAM2); break;
|
||||
case 32: ABI_CallFunctionRR(ProtectFunction((void *)&Memory::Write_U32, 2), ABI_PARAM1, ABI_PARAM2); break;
|
||||
case 16: ABI_CallFunctionRR(ProtectFunction((void *)&Memory::Write_U16, 2), ABI_PARAM1, ABI_PARAM2); break;
|
||||
case 8: ABI_CallFunctionRR(ProtectFunction((void *)&Memory::Write_U8, 2), ABI_PARAM1, ABI_PARAM2); break;
|
||||
}
|
||||
SetJumpTarget(arg2);
|
||||
gpr.UnlockAll();
|
||||
|
||||
@@ -65,7 +65,6 @@ static u32 GC_ALIGNED16(temp32);
|
||||
void lfs(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START;
|
||||
DISABLE_32BIT;
|
||||
int d = inst.RD;
|
||||
int a = inst.RA;
|
||||
if (!a)
|
||||
@@ -74,15 +73,8 @@ void lfs(UGeckoInstruction inst)
|
||||
return;
|
||||
}
|
||||
s32 offset = (s32)(s16)inst.SIMM_16;
|
||||
|
||||
if (jo.noAssumeFPLoadFromMem) {
|
||||
// We might call a function.
|
||||
gpr.Flush(FLUSH_VOLATILE);
|
||||
fpr.Flush(FLUSH_VOLATILE);
|
||||
gpr.FlushLockX(ABI_PARAM1);
|
||||
}
|
||||
gpr.Lock(d, a);
|
||||
|
||||
gpr.FlushLockX(ABI_PARAM1);
|
||||
gpr.Lock(a);
|
||||
MOV(32, R(ABI_PARAM1), gpr.R(a));
|
||||
if (!jo.noAssumeFPLoadFromMem)
|
||||
{
|
||||
@@ -103,6 +95,7 @@ void lfs(UGeckoInstruction inst)
|
||||
fpr.UnlockAll();
|
||||
}
|
||||
|
||||
|
||||
void lfd(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START;
|
||||
@@ -115,11 +108,12 @@ void lfd(UGeckoInstruction inst)
|
||||
return;
|
||||
}
|
||||
s32 offset = (s32)(s16)inst.SIMM_16;
|
||||
gpr.FlushLockX(ABI_PARAM1);
|
||||
gpr.Lock(a);
|
||||
MOV(32, R(ABI_PARAM1), gpr.R(a));
|
||||
fpr.LoadToX64(d, false);
|
||||
fpr.Lock(d);
|
||||
if (cpu_info.bSSE3NewInstructions) {
|
||||
if (cpu_info.bSSSE3) {
|
||||
X64Reg xd = fpr.RX(d);
|
||||
MOVQ_xmm(xd, MComplex(RBX, ABI_PARAM1, SCALE_1, offset));
|
||||
PSHUFB(xd, M((void *)bswapShuffle1x8Dupe));
|
||||
@@ -130,13 +124,14 @@ void lfd(UGeckoInstruction inst)
|
||||
MOVDDUP(fpr.RX(d), M(&temp64));
|
||||
}
|
||||
gpr.UnlockAll();
|
||||
gpr.UnlockAllX();
|
||||
fpr.UnlockAll();
|
||||
}
|
||||
|
||||
void stfd(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START;
|
||||
if (!cpu_info.bSSSE3NewInstructions)
|
||||
if (!cpu_info.bSSSE3)
|
||||
{
|
||||
DISABLE_32BIT;
|
||||
}
|
||||
@@ -148,14 +143,14 @@ void stfd(UGeckoInstruction inst)
|
||||
return;
|
||||
}
|
||||
s32 offset = (s32)(s16)inst.SIMM_16;
|
||||
gpr.FlushLockX(ABI_PARAM1);
|
||||
gpr.Lock(a);
|
||||
fpr.Lock(s);
|
||||
gpr.FlushLockX(ABI_PARAM1);
|
||||
MOV(32, R(ABI_PARAM1), gpr.R(a));
|
||||
#ifdef _M_IX86
|
||||
AND(32, R(ABI_PARAM1), Imm32(Memory::MEMVIEW32_MASK));
|
||||
#endif
|
||||
if (cpu_info.bSSSE3NewInstructions) {
|
||||
if (cpu_info.bSSSE3) {
|
||||
MOVAPS(XMM0, fpr.R(s));
|
||||
PSHUFB(XMM0, M((void *)bswapShuffle1x8));
|
||||
#ifdef _M_X64
|
||||
@@ -175,6 +170,7 @@ void stfd(UGeckoInstruction inst)
|
||||
fpr.UnlockAll();
|
||||
}
|
||||
|
||||
|
||||
void stfs(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START;
|
||||
@@ -185,12 +181,11 @@ void stfs(UGeckoInstruction inst)
|
||||
s32 offset = (s32)(s16)inst.SIMM_16;
|
||||
if (a && !update)
|
||||
{
|
||||
gpr.Flush(FLUSH_VOLATILE);
|
||||
fpr.Flush(FLUSH_VOLATILE);
|
||||
gpr.FlushLockX(ABI_PARAM1, ABI_PARAM2);
|
||||
gpr.Lock(a);
|
||||
fpr.Lock(s);
|
||||
gpr.FlushLockX(ABI_PARAM1, ABI_PARAM2);
|
||||
MOV(32, R(ABI_PARAM2), gpr.R(a));
|
||||
ADD(32, R(ABI_PARAM2), Imm32(offset));
|
||||
if (update && offset)
|
||||
{
|
||||
MOV(32, gpr.R(a), R(ABI_PARAM2));
|
||||
@@ -198,7 +193,7 @@ void stfs(UGeckoInstruction inst)
|
||||
CVTSD2SS(XMM0, fpr.R(s));
|
||||
MOVSS(M(&temp32), XMM0);
|
||||
MOV(32, R(ABI_PARAM1), M(&temp32));
|
||||
SafeWriteRegToReg(ABI_PARAM1, ABI_PARAM2, 32, offset);
|
||||
SafeWriteRegToReg(ABI_PARAM1, ABI_PARAM2, 32, 0);
|
||||
gpr.UnlockAll();
|
||||
gpr.UnlockAllX();
|
||||
fpr.UnlockAll();
|
||||
@@ -209,6 +204,7 @@ void stfs(UGeckoInstruction inst)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void lfsx(UGeckoInstruction inst)
|
||||
{
|
||||
INSTRUCTION_START;
|
||||
@@ -217,8 +213,7 @@ void lfsx(UGeckoInstruction inst)
|
||||
MOV(32, R(EAX), gpr.R(inst.RB));
|
||||
if (inst.RA)
|
||||
ADD(32, R(EAX), gpr.R(inst.RA));
|
||||
if (cpu_info.bSSSE3NewInstructions) {
|
||||
// PanicAlert("SSE3 supported!");
|
||||
if (cpu_info.bSSSE3) {
|
||||
X64Reg r = fpr.R(inst.RS).GetSimpleReg();
|
||||
#ifdef _M_IX86
|
||||
AND(32, R(EAX), Imm32(Memory::MEMVIEW32_MASK));
|
||||
|
||||
@@ -20,6 +20,7 @@
|
||||
|
||||
#include "Common.h"
|
||||
|
||||
#include "Thunk.h"
|
||||
#include "../PowerPC.h"
|
||||
#include "../../Core.h"
|
||||
#include "../../HW/GPFifo.h"
|
||||
@@ -36,7 +37,7 @@
|
||||
#include "JitAsm.h"
|
||||
#include "JitRegCache.h"
|
||||
|
||||
// #define INSTRUCTION_START Default(inst); return;
|
||||
//#define INSTRUCTION_START Default(inst); return;
|
||||
#define INSTRUCTION_START
|
||||
|
||||
#ifdef _M_IX86
|
||||
@@ -125,8 +126,6 @@ void psq_st(UGeckoInstruction inst)
|
||||
if (stType == QUANTIZE_FLOAT)
|
||||
{
|
||||
DISABLE_32BIT;
|
||||
gpr.Flush(FLUSH_VOLATILE);
|
||||
fpr.Flush(FLUSH_VOLATILE);
|
||||
gpr.FlushLockX(ABI_PARAM1, ABI_PARAM2);
|
||||
gpr.Lock(a);
|
||||
fpr.Lock(s);
|
||||
@@ -147,7 +146,7 @@ void psq_st(UGeckoInstruction inst)
|
||||
MOV(64, MComplex(RBX, ABI_PARAM2, SCALE_1, 0), R(ABI_PARAM1));
|
||||
FixupBranch arg2 = J();
|
||||
SetJumpTarget(argh);
|
||||
CALL((void *)&WriteDual32);
|
||||
CALL(ProtectFunction((void *)&WriteDual32, 0));
|
||||
SetJumpTarget(arg2);
|
||||
gpr.UnlockAll();
|
||||
gpr.UnlockAllX();
|
||||
@@ -255,7 +254,7 @@ void psq_l(UGeckoInstruction inst)
|
||||
#ifdef _M_X64
|
||||
gpr.LoadToX64(inst.RA, true, update);
|
||||
fpr.LoadToX64(inst.RS, false);
|
||||
if (cpu_info.bSSSE3NewInstructions) {
|
||||
if (cpu_info.bSSSE3) {
|
||||
X64Reg xd = fpr.R(inst.RS).GetSimpleReg();
|
||||
MOVQ_xmm(xd, MComplex(RBX, gpr.R(inst.RA).GetSimpleReg(), 1, offset));
|
||||
PSHUFB(xd, M((void *)pbswapShuffle2x4));
|
||||
@@ -272,7 +271,7 @@ void psq_l(UGeckoInstruction inst)
|
||||
ADD(32, gpr.R(inst.RA), Imm32(offset));
|
||||
break;
|
||||
#else
|
||||
if (cpu_info.bSSSE3NewInstructions) {
|
||||
if (cpu_info.bSSSE3) {
|
||||
gpr.LoadToX64(inst.RA, true, update);
|
||||
fpr.LoadToX64(inst.RS, false);
|
||||
X64Reg xd = fpr.R(inst.RS).GetSimpleReg();
|
||||
@@ -282,8 +281,7 @@ void psq_l(UGeckoInstruction inst)
|
||||
PSHUFB(xd, M((void *)pbswapShuffle2x4));
|
||||
CVTPS2PD(xd, R(xd));
|
||||
} else {
|
||||
gpr.FlushR(ECX);
|
||||
gpr.LockX(ECX);
|
||||
gpr.FlushLockX(ECX);
|
||||
gpr.LoadToX64(inst.RA);
|
||||
// This can probably be optimized somewhat.
|
||||
LEA(32, ECX, MDisp(gpr.R(inst.RA).GetSimpleReg(), offset));
|
||||
|
||||
@@ -93,8 +93,6 @@ namespace Jit64
|
||||
fpr.UnlockAll();
|
||||
}
|
||||
|
||||
|
||||
|
||||
//add a, b, c
|
||||
|
||||
//mov a, b
|
||||
|
||||
@@ -59,7 +59,7 @@ namespace Jit64
|
||||
case SPR_GQR0 + 5:
|
||||
case SPR_GQR0 + 6:
|
||||
case SPR_GQR0 + 7:
|
||||
js.blockSetsQuantizers = false;
|
||||
js.blockSetsQuantizers = true;
|
||||
// Prevent recompiler from compiling in old quantizer values.
|
||||
// TODO - actually save the set state and use it in following quantizer ops.
|
||||
break;
|
||||
|
||||
Reference in new issue
Block a user