PowerPC: Convert CPUCore enum into an enum class

Makes the enum values strongly-typed and prevents the identifiers from
polluting the PowerPC namespace. This also cleans up the parameters of
some functions where we were accepting an ambiguous int type and
expecting the correct values to be passed in.

Now those parameters accept a PowerPC::CPUCore type only, making it
immediately obvious which values should be passed in. It also turns out
we were storing these core types into other structures as plain ints,
which have also been corrected.

As this type is used directly with the configuration code, we need to
provide our own overloaded insertion (<<) and extraction (>>) operators
in order to make it compatible with it. These are fairly trivial to
implement, so there's no issue here.

A minor adjustment to TryParse() was required, as our generic function
was doing the following:

N tmp = 0;

which is problematic, as custom types may not be able to have that
assignment performed (e.g. strongly-typed enums), so we change this to:

N tmp;

which is sufficient, as the value is attempted to be initialized
immediately under that statement.

Source/Core/Core/PowerPC/JitInterface.cpp

@@ -45,28 +45,28 @@ void DoState(PointerWrap& p)
   if (g_jit && p.GetMode() == PointerWrap::MODE_READ)
     g_jit->ClearCache();
 }
-CPUCoreBase* InitJitCore(int core)
+CPUCoreBase* InitJitCore(PowerPC::CPUCore core)
 {
   switch (core)
   {
 #if _M_X86
-  case PowerPC::CORE_JIT64:
+  case PowerPC::CPUCore::JIT64:
     g_jit = new Jit64();
     break;
 #endif
 #if _M_ARM_64
-  case PowerPC::CORE_JITARM64:
+  case PowerPC::CPUCore::JITARM64:
     g_jit = new JitArm64();
     break;
 #endif
-  case PowerPC::CORE_CACHEDINTERPRETER:
+  case PowerPC::CPUCore::CachedInterpreter:
     g_jit = new CachedInterpreter();
     break;
 
   default:
     PanicAlertT("The selected CPU emulation core (%d) is not available. "
                 "Please select a different CPU emulation core in the settings.",
-                core);
+                static_cast<int>(core));
     g_jit = nullptr;
     return nullptr;
   }

Source/Core/Core/PowerPC/JitInterface.h

@@ -12,6 +12,11 @@
 class CPUCoreBase;
 class PointerWrap;
 
+namespace PowerPC
+{
+enum class CPUCore;
+}
+
 namespace Profiler
 {
 struct ProfileStats;
@@ -28,7 +33,7 @@ enum class ExceptionType
 
 void DoState(PointerWrap& p);
 
-CPUCoreBase* InitJitCore(int core);
+CPUCoreBase* InitJitCore(PowerPC::CPUCore core);
 CPUCoreBase* GetCore();
 
 // Debugging

Source/Core/Core/PowerPC/PowerPC.cpp

@@ -5,6 +5,9 @@
 #include "Core/PowerPC/PowerPC.h"
 
 #include <cstring>
+#include <istream>
+#include <ostream>
+#include <type_traits>
 #include <vector>
 
 #include "Common/Assert.h"
@@ -44,6 +47,30 @@ static void InvalidateCacheThreadSafe(u64 userdata, s64 cyclesLate)
   ppcState.iCache.Invalidate(static_cast<u32>(userdata));
 }
 
+std::istream& operator>>(std::istream& is, CPUCore& core)
+{
+  std::underlying_type_t<CPUCore> val{};
+
+  if (is >> val)
+  {
+    core = static_cast<CPUCore>(val);
+  }
+  else
+  {
+    // Upon failure, fall back to the cached interpreter
+    // to ensure we always initialize our core reference.
+    core = CPUCore::CachedInterpreter;
+  }
+
+  return is;
+}
+
+std::ostream& operator<<(std::ostream& os, CPUCore core)
+{
+  os << static_cast<std::underlying_type_t<CPUCore>>(core);
+  return os;
+}
+
 u32 CompactCR()
 {
   u32 new_cr = 0;
@@ -148,7 +175,7 @@ static void ResetRegisters()
   SystemTimers::DecrementerSet();
 }
 
-static void InitializeCPUCore(int cpu_core)
+static void InitializeCPUCore(CPUCore cpu_core)
 {
   // We initialize the interpreter because
   // it is used on boot and code window independently.
@@ -156,7 +183,7 @@ static void InitializeCPUCore(int cpu_core)
 
   switch (cpu_core)
   {
-  case PowerPC::CORE_INTERPRETER:
+  case CPUCore::Interpreter:
     s_cpu_core_base = s_interpreter;
     break;
 
@@ -176,12 +203,12 @@ static void InitializeCPUCore(int cpu_core)
 const std::vector<CPUCore>& AvailableCPUCores()
 {
   static const std::vector<CPUCore> cpu_cores = {
-      CORE_INTERPRETER,
-      CORE_CACHEDINTERPRETER,
+      CPUCore::Interpreter,
+      CPUCore::CachedInterpreter,
 #ifdef _M_X86_64
-      CORE_JIT64,
+      CPUCore::JIT64,
 #elif defined(_M_ARM_64)
-      CORE_JITARM64,
+      CPUCore::JITARM64,
 #endif
   };
 
@@ -191,15 +218,15 @@ const std::vector<CPUCore>& AvailableCPUCores()
 CPUCore DefaultCPUCore()
 {
 #ifdef _M_X86_64
-  return CORE_JIT64;
+  return CPUCore::JIT64;
 #elif defined(_M_ARM_64)
-  return CORE_JITARM64;
+  return CPUCore::JITARM64;
 #else
-  return CORE_CACHEDINTERPRETER;
+  return CPUCore::CachedInterpreter;
 #endif
 }
 
-void Init(int cpu_core)
+void Init(CPUCore cpu_core)
 {
   // NOTE: This function runs on EmuThread, not the CPU Thread.
   //   Changing the rounding mode has a limited effect.

Source/Core/Core/PowerPC/PowerPC.h

@@ -6,6 +6,7 @@
 
 #include <array>
 #include <cstddef>
+#include <iosfwd>
 #include <tuple>
 #include <vector>
 
@@ -23,14 +24,18 @@ namespace PowerPC
 {
 // The gaps in the CPUCore numbering are from cores that only existed in the past.
 // We avoid re-numbering cores so that settings will be compatible across versions.
-enum CPUCore
+enum class CPUCore
 {
-  CORE_INTERPRETER = 0,
-  CORE_JIT64 = 1,
-  CORE_JITARM64 = 4,
-  CORE_CACHEDINTERPRETER = 5,
+  Interpreter = 0,
+  JIT64 = 1,
+  JITARM64 = 4,
+  CachedInterpreter = 5,
 };
 
+// For reading from and writing to our config.
+std::istream& operator>>(std::istream& is, CPUCore& core);
+std::ostream& operator<<(std::ostream& os, CPUCore core);
+
 enum class CoreMode
 {
   Interpreter,
@@ -142,7 +147,7 @@ extern PPCDebugInterface debug_interface;
 const std::vector<CPUCore>& AvailableCPUCores();
 CPUCore DefaultCPUCore();
 
-void Init(int cpu_core);
+void Init(CPUCore cpu_core);
 void Reset();
 void Shutdown();
 void DoState(PointerWrap& p);