JIT: fix handling of PC in dispatcher/block cache.

Specifically, don't make any assumptions about what effective addresses
are used for code, and correctly handle changes to MSR.DR/MSR.IR.

(Split off from dynamic-bat.)

Source/Core/Core/PowerPC/CachedInterpreter.cpp

@@ -41,34 +41,29 @@ void CachedInterpreter::Run()
 
 void CachedInterpreter::SingleStep()
 {
-  int block = GetBlockNumberFromStartAddress(PC);
-  if (block >= 0)
+  const u8* normalEntry = jit->GetBlockCache()->Dispatch();
+  const Instruction* code = reinterpret_cast<const Instruction*>(normalEntry);
+
+  while (true)
   {
-    Instruction* code = (Instruction*)GetCompiledCodeFromBlock(block);
-
-    while (true)
+    switch (code->type)
     {
-      switch (code->type)
-      {
-      case Instruction::INSTRUCTION_ABORT:
+    case Instruction::INSTRUCTION_ABORT:
+      return;
+
+    case Instruction::INSTRUCTION_TYPE_COMMON:
+      code->common_callback(UGeckoInstruction(code->data));
+      code++;
+      break;
+
+    case Instruction::INSTRUCTION_TYPE_CONDITIONAL:
+      bool ret = code->conditional_callback(code->data);
+      code++;
+      if (ret)
         return;
-
-      case Instruction::INSTRUCTION_TYPE_COMMON:
-        code->common_callback(UGeckoInstruction(code->data));
-        code++;
-        break;
-
-      case Instruction::INSTRUCTION_TYPE_CONDITIONAL:
-        bool ret = code->conditional_callback(code->data);
-        code++;
-        if (ret)
-          return;
-        break;
-      }
+      break;
     }
   }
-
-  Jit(PC);
 }
 
 static void EndBlock(UGeckoInstruction data)