Make address translation respect the CPU translation mode.

The PowerPC CPU has bits in MSR (DR and IR) which control whether
addresses are translated. We should respect these instead of mixing
physical addresses and translated addresses into the same address space.

This is mostly mass-renaming calls to memory accesses APIs from places
which expect address translation to use a different version from those
which do not expect address translation.

This does very little on its own, but it's the first step to a correct BAT
implementation.

Source/Core/Core/PowerPC/Jit64IL/IR_X86.cpp

@@ -500,7 +500,7 @@ static void regMarkMemAddress(RegInfo& RI, InstLoc I, InstLoc AI, unsigned OpNum
 	if (isImm(*AI))
 	{
 		unsigned addr = RI.Build->GetImmValue(AI);
-		if (Memory::IsRAMAddress(addr))
+		if (PowerPC::IsOptimizableRAMAddress(addr))
 			return;
 	}
 
@@ -520,7 +520,7 @@ static std::pair<OpArg, u32> regBuildMemAddress(RegInfo& RI, InstLoc I, InstLoc
 	if (isImm(*AI))
 	{
 		unsigned addr = RI.Build->GetImmValue(AI);
-		if (Memory::IsRAMAddress(addr))
+		if (PowerPC::IsOptimizableRAMAddress(addr))
 		{
 			if (dest)
 				*dest = regFindFreeReg(RI);

Source/Core/Core/PowerPC/Jit64IL/JitIL.cpp

@@ -521,6 +521,7 @@ void JitIL::Jit(u32 em_address)
 		NPC = nextPC;
 		PowerPC::ppcState.Exceptions |= EXCEPTION_ISI;
 		PowerPC::CheckExceptions();
+		WARN_LOG(POWERPC, "ISI exception at 0x%08x", nextPC);
 		return;
 	}