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Core: Pre-shift pagetable_hashmask left by 6

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This will make the upcoming commits just a little bit neater to
implement.
This commit is contained in:
JosJuice
2026-02-01 12:39:33 +01:00
parent 08884746ed
commit d3ec630904
4 changed files with 6 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Source/Core/Core/PowerPC/MMU.cpp
+2 -2
View File
@@ -1216,7 +1216,7 @@ void MMU::SDRUpdated()
WARN_LOG_FMT(POWERPC, "Invalid HTABORG: htaborg=0x{:08x} htabmask=0x{:08x}", htaborg, htabmask); WARN_LOG_FMT(POWERPC, "Invalid HTABORG: htaborg=0x{:08x} htabmask=0x{:08x}", htaborg, htabmask);
m_ppc_state.pagetable_base = htaborg << 16; m_ppc_state.pagetable_base = htaborg << 16;
m_ppc_state.pagetable_hashmask = ((htabmask << 10) | 0x3ff); m_ppc_state.pagetable_mask = (htabmask << 16) | 0xffc0;
} }
void MMU::SRUpdated() void MMU::SRUpdated()
@@ -1363,7 +1363,7 @@ MMU::TranslateAddressResult MMU::TranslatePageAddress(const EffectiveAddress add
pte1.H = 1; pte1.H = 1;
} }
u32 pteg_addr = ((hash & m_ppc_state.pagetable_hashmask) << 6) | m_ppc_state.pagetable_base; u32 pteg_addr = ((hash << 6) & m_ppc_state.pagetable_mask) | m_ppc_state.pagetable_base;
for (int i = 0; i < 8; i++, pteg_addr += 8) for (int i = 0; i < 8; i++, pteg_addr += 8)
{ {
Source/Core/Core/PowerPC/PowerPC.cpp
+2 -2
View File
@@ -94,7 +94,7 @@ void PowerPCManager::DoState(PointerWrap& p)
p.DoArray(m_ppc_state.spr); p.DoArray(m_ppc_state.spr);
p.DoArray(m_ppc_state.tlb); p.DoArray(m_ppc_state.tlb);
p.Do(m_ppc_state.pagetable_base); p.Do(m_ppc_state.pagetable_base);
p.Do(m_ppc_state.pagetable_hashmask); p.Do(m_ppc_state.pagetable_mask);
p.Do(m_ppc_state.reserve); p.Do(m_ppc_state.reserve);
p.Do(m_ppc_state.reserve_address); p.Do(m_ppc_state.reserve_address);
@@ -274,7 +274,7 @@ void PowerPCManager::Init(CPUCore cpu_core)
void PowerPCManager::Reset() void PowerPCManager::Reset()
{ {
m_ppc_state.pagetable_base = 0; m_ppc_state.pagetable_base = 0;
m_ppc_state.pagetable_hashmask = 0; m_ppc_state.pagetable_mask = 0;
m_ppc_state.tlb = {}; m_ppc_state.tlb = {};
ResetRegisters(); ResetRegisters();
Source/Core/Core/PowerPC/PowerPC.h
+1 -1
View File
@@ -178,7 +178,7 @@ struct PowerPCState
std::array<std::array<TLBEntry, TLB_SIZE / TLB_WAYS>, NUM_TLBS> tlb; std::array<std::array<TLBEntry, TLB_SIZE / TLB_WAYS>, NUM_TLBS> tlb;
u32 pagetable_base = 0; u32 pagetable_base = 0;
u32 pagetable_hashmask = 0; u32 pagetable_mask = 0;
InstructionCache iCache; InstructionCache iCache;
bool m_enable_dcache = false; bool m_enable_dcache = false;
Source/Core/DolphinQt/Debugger/RegisterWidget.cpp
+1 -1
View File
@@ -494,7 +494,7 @@ void RegisterWidget::PopulateTable()
31, 5, RegisterType::pt_hashmask, "Hash Mask", 31, 5, RegisterType::pt_hashmask, "Hash Mask",
[this] { [this] {
const auto& ppc_state = m_system.GetPPCState(); const auto& ppc_state = m_system.GetPPCState();
return (ppc_state.pagetable_hashmask << 6) | ppc_state.pagetable_base; return ppc_state.pagetable_mask | ppc_state.pagetable_base;
}, },
nullptr); nullptr);