[AArch64] Fix AArch64 instruction encoding.

2015-01-25 17:26:18 -06:00
parent e4e08b0596
commit f24c466e7e
2 changed files with 6 additions and 4 deletions
@@ -321,8 +321,8 @@ void JitArm64::fselx(UGeckoInstruction inst)
 	ARM64Reg VB = fpr.R(inst.FB);
 	ARM64Reg VC = fpr.R(inst.FC);

-	m_float_emit.FCMPE(VA);
-	m_float_emit.FCSEL(V0, VC, VB, CC_GE);
+	m_float_emit.FCMPE(EncodeRegToDouble(VA));
+	m_float_emit.FCSEL(EncodeRegToDouble(V0), EncodeRegToDouble(VC), EncodeRegToDouble(VB), CC_GE);
 	m_float_emit.INS(64, VD, 0, V0, 0);

 	fpr.Unlock(V0);