Replaces them with forward declarations of used types, or removes them entirely if they aren't used at all. This also replaces certain Common headers with less inclusive ones (in terms of definitions they pull in).
- Move JitState::memcheck to JitOptions because it's an option.
- Add JitOptions::fastmem; switch JIT code to checking that rather than
bFastmem directly.
- Add JitBase::UpdateMemoryOptions(), which sets both two JIT options
(replacing the duplicate lines in Jit64 and JitIL that set memcheck
from bMMU).
- (!) The ARM JITs both had some lines that checked js.memcheck
despite it being uninitialized in their cases. I've added
UpdateMemoryOptions to both. There is a chance this could make
something slower compared to the old behavior if the uninitialized
value happened to be nonzero... hdkr should check this.
- UpdateMemoryOptions forces jo.fastmem and jo.memcheck off and on,
respectively, if there are any watchpoints set.
- Also call that function from ClearCache.
- Have MemChecks call ClearCache when the {first,last} watchpoint is
{added,removed}.
Enabling jo.memcheck (bah, confusing names) is currently pointless
because hitting a watchpoint does not interrupt the basic block. That
will change in the next commit.
The regBuildMemAddress function already clears the address register.
Not only is clearing it again pointless, regBuildMemAddress uses the
bits in IInfo slightly diffrently and the second clear can clear
the wrong registers causing bugs if something else actually needs to
use those registers.
The PowerPC CPU has bits in MSR (DR and IR) which control whether
addresses are translated. We should respect these instead of mixing
physical addresses and translated addresses into the same address space.
This is mostly mass-renaming calls to memory accesses APIs from places
which expect address translation to use a different version from those
which do not expect address translation.
This does very little on its own, but it's the first step to a correct BAT
implementation.
We don't need to profile explicit calls to CheckGatherPipe: we aleady know
where they are. Skip profiling, and explciitly insert an exception check.
While I'm here, get rid of unused code in JitIL.
For floating loads with a known address, this eliminates the pattern of:
mov r12d, 80001014
mov rdx, r12d
mov rdx, dword ptr [rbp+rdx]
and generates a nice simple:
mov rdx, dword ptr [rbp+00001014]
Now it should be easier to merge more than 2-instruction-long sequences.
Also correct some minor inconsistencies in behavior between instruction
merging cases.
When we try to JIT from a block which doesn't exist, don't JIT any code;
just update the PPC state to indicate an ISI. This is a little simpler,
and avoids abusing the JIT block cache.
This doesn't seem to be necessary anymore now that FPRF is implemented in the
JIT. Technically, this isn't the same as before, since the JIT doesn't
implement the fcmp exception semantics, but as far as testing has shown, this
doesn't seem necessary.
This should make games that use FPRF a few percent faster (e.g. F-Zero GX)
since fcmpx no longer has to be fallbacked.