Commit Graph
145 Commits
Author SHA1 Message Date
Lioncash fdafa5d063 Core: Move includes out of instruction table headers
These aren't necessary (and cause unnecessary indirect inclusions).
2015-08-22 14:15:02 -04:00
Lioncash a248a4d2ce Jit64/JitIL: Relocate instruction typedefs 2015-08-22 14:15:00 -04:00
Lioncash 95c57fcec1 Jit: Remove unnecessary namespace prefixes 2015-08-20 05:20:19 -04:00
Tillmann Karras a9447a8606 PowerPC: drop instructions not supported by GC/Wii 2015-08-17 06:03:11 +02:00
Tillmann Karras 334c1bfdf6 Jit64[IL]: drop WriteCallInterpreter 2015-07-17 03:25:38 +02:00
degasus 6f38d1baa1 CodeBlock: Add a shared IsAlmostFull function
This function shall keep care about the low watermark of code space.
If we ran out of space, the JITs shall clear their block cache.
2015-07-15 08:53:05 +02:00
degasus 717d4bfbcc Interpreter: Idle skipping support 2015-06-30 20:11:23 +02:00
Matthew Parlane f32cede086 Revert "x64: build a Position-Independent Executable (PIE)" 2015-06-14 16:06:26 +12:00
degasus c375111076 Options: merge SCoreStartupParameter into SConfig 2015-06-12 19:07:45 +02:00
Tillmann Karras d4538c762f MemoryUtil: get executable pages near static data
and clean up a bit.
2015-06-03 21:44:31 +02:00
Tillmann Karras a0597f0d62 Jit64: turn 32 bit addresses into offsets 2015-06-03 21:44:31 +02:00
Ryan Houdek 6c56cd0c30 Fix JIT core's block sizes.
Was causing disassembled blocks to be cut off by a few instructions at the end.
2015-05-31 14:59:17 -05:00
Lioncash e3a6191f02 x64Emitter: Pass some OpArg parameters by const reference
Considering OpArg is a struct, passing by value creates unnecessary copies.
2015-05-29 01:13:29 -04:00
Ryan Houdek 3817dd0f91 Merge pull request #2272 from phire/jitil-floatbug
JitIL: Fix a bug in floatpoint load/store instructions.
2015-05-25 23:17:56 -04:00
Tillmann Karras 30ebb2459e Set copyright year to when a file was created 2015-05-25 13:22:31 +02:00
Tillmann Karras cefcb0ace9 Update license headers to GPLv2+ 2015-05-25 13:22:31 +02:00
Tillmann Karras c651906134 Jit64[IL]: remove some unused stuff 2015-05-09 17:17:49 +02:00
Lioncash 76bbd46829 Core: Remove some header inclusions in header files
Replaces them with forward declarations of used types, or removes them entirely if they aren't used at all. This also replaces certain Common headers with less inclusive ones (in terms of definitions they pull in).
2015-05-08 22:38:59 -04:00
comex b84f6a55ab Automatically disable fastmem and enable memcheck when there are any watchpoints.
- Move JitState::memcheck to JitOptions because it's an option.
- Add JitOptions::fastmem; switch JIT code to checking that rather than
  bFastmem directly.
- Add JitBase::UpdateMemoryOptions(), which sets both two JIT options
  (replacing the duplicate lines in Jit64 and JitIL that set memcheck
  from bMMU).
  - (!) The ARM JITs both had some lines that checked js.memcheck
    despite it being uninitialized in their cases.  I've added
    UpdateMemoryOptions to both.  There is a chance this could make
    something slower compared to the old behavior if the uninitialized
    value happened to be nonzero... hdkr should check this.
- UpdateMemoryOptions forces jo.fastmem and jo.memcheck off and on,
  respectively, if there are any watchpoints set.
- Also call that function from ClearCache.
- Have MemChecks call ClearCache when the {first,last} watchpoint is
  {added,removed}.

Enabling jo.memcheck (bah, confusing names) is currently pointless
because hitting a watchpoint does not interrupt the basic block.  That
will change in the next commit.
2015-04-24 22:37:53 -04:00
Scott Mansell 9fdc713c87 While I'm here, Add some comments. 2015-04-05 21:19:56 +12:00
Scott Mansell e9459fb30a JitIL: Fix a bug in floatpoint load/store instructions.
The regBuildMemAddress function already clears the address register.
Not only is clearing it again pointless, regBuildMemAddress uses the
bits in IInfo slightly diffrently and the second clear can clear
the wrong registers causing bugs if something else actually needs to
use those registers.
2015-04-05 20:17:50 +12:00
Lioncash 1fc1880ca5 Interpreter/Jit Tables: Merge table31 and table31_2 2015-03-20 20:39:51 -04:00
Lioncash 1052863bb9 Interpreter/JIT: Add missing overflow variants into the tables. 2015-03-20 19:20:38 -04:00
Shawn Hoffman ad64336137 quiet some warnings which appear on vs2015.
quieted warnings include shadowed variable names and integer extensions.
2015-03-15 19:28:47 -07:00
magumagu 87dcda5785 Remove remnants of old fake opcodes.
These are illegal opcodes, and should be treated as such.
2015-03-14 16:59:12 -07:00
Darius Goad f4750804ab Add various loads and stores to JitIL 2015-03-03 11:17:25 -06:00
Stevoisiak 93b16a4a2d Formatting/Whitespace Cleanup
Various fixes to formatting and whitespace
2015-02-25 10:48:21 -05:00
Tillmann Karras f298f00e1b Clean up the intrinsics #ifdef mess 2015-02-24 01:02:36 +01:00
magumagu 9e29154b08 Merge pull request #1988 from magumagu/fast-checkgatherpipe
Use faster CheckGatherPipe from JIT.
2015-02-21 15:07:59 -08:00
magumagu 985087c7e2 Make all unknown opcodes behave consistently.
Consistently fall back to the interpreter for unknown instructions, and
make sure GetOpInfo() always returns a non-null pointer.
2015-02-11 22:18:33 -08:00
magumagu ac54c6a4e2 Make address translation respect the CPU translation mode.
The PowerPC CPU has bits in MSR (DR and IR) which control whether
addresses are translated. We should respect these instead of mixing
physical addresses and translated addresses into the same address space.

This is mostly mass-renaming calls to memory accesses APIs from places
which expect address translation to use a different version from those
which do not expect address translation.

This does very little on its own, but it's the first step to a correct BAT
implementation.
2015-02-11 13:56:22 -08:00
Lioncash e07679114b Use emplace_* functions where in-place construction is preferable 2015-02-04 11:39:08 -05:00
magumagu 5a3f75f5cf Use faster CheckGatherPipe from JIT.
We don't need to profile explicit calls to CheckGatherPipe: we aleady know
where they are. Skip profiling, and explciitly insert an exception check.

While I'm here, get rid of unused code in JitIL.
2015-01-30 17:00:58 -08:00
Scott Mansell 3106b20fbe JITIL: Improve address calulation for float loads/stores.
For floating loads with a known address, this eliminates the pattern of:

   mov r12d, 80001014
   mov rdx, r12d
   mov rdx, dword ptr [rbp+rdx]

and generates a nice simple:

   mov rdx, dword ptr [rbp+00001014]
2015-01-24 16:08:50 +13:00
skidau f1a4b98d36 Merge pull request #1879 from magumagu/idle-exception-check
For idle loops, perform an exception check before CoreTiming::Advance.
2015-01-24 12:28:44 +11:00
Ryan Houdek 80e6367e46 Merge pull request #1869 from Stevoisiak/GeneralConsistency
Minor consistency changes
2015-01-21 13:46:53 -06:00
magumagu e92e1e5873 Remove HLE_HOOK_END.
It isn't used, it isn't implemented in interpreter, and the implementation
in JIT is wrong.
2015-01-15 11:54:20 -08:00
Stevoisiak cb86db7b68 Minor consistency changes
Mostly small changes, like capitalization and spelling
2015-01-12 15:18:18 -05:00
magumagu 213eb730d0 For idle loops, don't explicitly call CoreTiming::Advance.
This is more consistent with the way Dolphin behaves with idle skipping off.
2015-01-11 20:42:08 -08:00
Fiora e8cfcd3aeb JIT: make instruction merging generic
Now it should be easier to merge more than 2-instruction-long sequences.
Also correct some minor inconsistencies in behavior between instruction
merging cases.
2015-01-11 09:11:18 -08:00
Fiora 3d2492627f Fastmem: increase the size of trampoline cache in MMU mode, check space
Fastmem in MMU mode generates way more trampolines than normal, so we need
a bunch more space too, lest we run out of room.
2015-01-05 10:46:01 -08:00
magumagu 1e370550c4 JIT: simplify ISI handling.
When we try to JIT from a block which doesn't exist, don't JIT any code;
just update the PPC state to indicate an ISI.  This is a little simpler,
and avoids abusing the JIT block cache.
2015-01-01 19:25:48 -08:00
skidau 110d079c1e Enable block-linking with MMU. Blocks that cause an ISI exception are not linked. 2014-12-12 13:25:51 +11:00
Tillmann Karras 6e928d08a0 Jit64: clean up casts in memory operands 2014-12-07 20:23:27 +01:00
magumagu c693cf46e9 JIT: remove unused flag. 2014-11-29 12:41:36 -08:00
Ryan Houdek f588a82b9a Merge pull request #1294 from FioraAeterna/noaccuratefcmp
JIT: remove "accurate fcmp" option
2014-11-28 22:48:11 -06:00
Fiora 41f5ef3304 JIT: remove "fast interrupts" option set and then used nowhere 2014-11-28 06:42:40 -08:00
Fiora 3be31ca2c8 JIT: remove "accurate fcmp" option
This doesn't seem to be necessary anymore now that FPRF is implemented in the
JIT. Technically, this isn't the same as before, since the JIT doesn't
implement the fcmp exception semantics, but as far as testing has shown, this
doesn't seem necessary.

This should make games that use FPRF a few percent faster (e.g. F-Zero GX)
since fcmpx no longer has to be fallbacked.
2014-11-25 09:54:40 -08:00
comex aa2fc1f66b Merge pull request #1449 from comex/memtools-merge
Reorganize faulting stuff.  Differentiate between arch- and OS-specific defines.
2014-11-16 13:46:33 -05:00
Lioncash 3eab75bc9c Core: Join some variable declarations and assignments 2014-11-15 20:21:35 -05:00