Commit Graph
168 Commits
Author SHA1 Message Date
JosJuice 9462e9d890 Core: Update page table mappings incrementally
Removing and readding every page table mapping every time something
changes in the page table is very slow. Instead, let's generate a diff
and ask Memmap to update only the diff.
2026-02-04 21:35:20 +01:00
JosJuice 7b885b857e Core: Postpone page table updates when DR is unset
Page table mappings are only used when DR is set, so if page tables are
updated when DR isn't set, we can wait with updating page table mappings
until DR gets set. This lets us batch page table updates in the Disney
Trio of Destruction, improving performance when the games are loading
data. It doesn't help much for GameCube games, because those run tlbie
with DR set.

The PowerPCState struct has had its members slightly reordered. I had to
put pagetable_update_pending less than 4 KiB from the start so AArch64's
LDRB (immediate) can access it, and I also took the opportunity to move
some other members around to cut down on padding.
2026-02-04 21:34:07 +01:00
JosJuice 083f3a7e0e Core: Create fastmem mappings for page address translation
Previously we've only been setting up fastmem mappings for block address
translation, but now we also do it for page address translation. This
increases performance when games access memory using page tables, but
decreases performance when games set up page tables.

The tlbie instruction is used as an indication that the mappings need to
be updated.

There are some accuracy downsides:

* The TLB is now effectively infinitely large, which matters if games
  don't use tlbie when modifying page tables.
* The R and C bits for page table entries get set pessimistically rather
  than when the page is actually accessed.

No games are known to be broken by these inaccuracies, but unfortunately
the second inaccuracy causes a large performance regression in Rogue
Squadron 3. You still get the old, more accurate behavior if Enable
Write-Back Cache is on.
2026-02-04 21:33:56 +01:00
JosJuice d3ec630904 Core: Pre-shift pagetable_hashmask left by 6
This will make the upcoming commits just a little bit neater to
implement.
2026-02-01 12:39:33 +01:00
JosJuice 08884746ed Core: Detect SR updates 2026-02-01 12:39:33 +01:00
Martino Fontana a14c88ba67 Remove unused imports
Yellow squiggly lines begone!
Done automatically on .cpp files through `run-clang-tidy`, with manual corrections to the mistakes.
If an import is directly used, but is technically unnecessary since it's recursively imported by something else, it is *not* removed.
The tool doesn't touch .h files, so I did some of them by hand while fixing errors due to old recursive imports.
Not everything is removed, but the cleanup should be substantial enough.
Because this done on Linux, code that isn't used on it is mostly untouched.
(Hopefully no open PR is depending on these imports...)
2026-01-25 16:12:15 +01:00
JosJuice 8749855643 Call JitInterface::UpdateMembase from PowerPC::MSRUpdated
When the interpreter calls MSRUpdated, we should update the membase
variable. Not because the interpreter itself needs it, but because the
JIT needs it if it's falling back to the interpreter for an instruction
that sets the MSR.

Additionally, the JIT's FallBackToInterpreter needs to read back the new
membase value afterwards.

This fixes games crashing on JitArm64 if mtmsr is set to fall back to
interpreter. I was unable to reproduce the issue on Jit64, presumably
due to a fortunate series of coincidences (instructions that set MSR are
always followed by an exception exit, and
PowerPCManager::CheckExternalExceptions was always calling
JitInterface::UpdateMembase, and Jit64::WriteExceptionExit was always
calling Jit64::EmitUpdateMembase.)
2025-11-02 21:18:07 +01:00
mitaclaw 5a95951751 DolphinQt: Signal Host::JitCacheInvalidation in more places 2024-10-23 23:43:25 -07:00
mitaclaw 9bd1dae41d Modernize std::fill with ranges
In DSPCore.cpp, there were two `std::fill` uses that could be simplified using `std::fill_n`. Due to their proximity with other `std::fill` algorithms being modernized with ranges, I chose to make these examples into the rare `std::ranges::fill_n`.
2024-10-10 00:53:48 -07:00
Martino Fontana bd3cf67cbc Debugger: Rework temporary breakpoints
Before:
1. In theory there could be multiple, but in practice they were (manually) cleared before creating one
2. (Some of) the conditions to clear one were either to reach it, to create a new one (due to the point above), or to step. This created weird behavior: let's say you Step Over a `bl` (thus creating a temporary breakpoint on `pc+4`), and you reached a regular breakpoint inside the `bl`. The temporary one would still be there: if you resumed, the emulation would still stop there, as a sort of Step Out. But, if before resuming, you made a Step, then it wouldn't do that.
3. The breakpoint widget had no idea concept of them, and will treat them as regular breakpoints. Also, they'll be shown only when the widget is updated in some other way, leading to more confusion.
4. Because only one breakpoint could exist per address, the creation of a temporary breakpoint on a top of a regular one would delete it and inherit its properties (e.g. being log-only). This could happen, for instance, if you Stepped Over a `bl` specifically, and pc+4 had a regular breakpoint.

Now there can only be one temporary breakpoint, which is automatically cleared whenever emulation is paused. So, removing some manual clearing from 1., and removing the weird behavior of 2. As it is stored in a separate variable, it won't be seen at all depending on the function used (fixing 3., and removing some checks in other places), and it won't replace a regular breakpoint, instead simply having priority (fixing 4.).
2024-07-05 21:33:22 +02:00
Martino Fontana 8235c38df7 Debugger: Small other cleanup
Change misleading names.
Fix function usage: Intepreter and Step Out will not check breakpoints in their own wrong way anymore (e.g. breaking on log-only breakpoints).
2024-07-02 18:29:42 +02:00
Admiral H. Curtiss 0daf4d1281 Merge pull request #12762 from mitaclaw/dead-config-code
PowerPC: Remove Dead Config Code
2024-05-04 16:23:36 +02:00
mitaclaw 2b337aec58 PowerPC: Remove Dead Config Code 2024-05-03 21:54:47 -07:00
Pokechu22 fbbfea8e8e Replace Common::BitCast with std::bit_cast 2024-05-03 18:43:51 -07:00
mitaclaw cf74c0d683 PPCCache: Avoid Global System Accessor 2024-04-08 19:49:57 -07:00
mitaclaw c24fa93965 PPCSymbolDB: Move instance to PowerPCManager 2024-03-13 22:58:14 -07:00
Admiral H. Curtiss 9a3e770c23 Migrate SConfig::bWii to System. 2024-01-31 12:54:07 +01:00
Admiral H. Curtiss 07c035e659 Core/SystemTimers: Refactor to class, move to System. 2024-01-04 23:35:19 +01:00
JosJuice 62787085e1 Jit: Add feature flag for performance monitor
By making the JIT cache check if the current state of MMCR0 and MMRC1
matches the state they had at the time the JIT block was compiled, we
solve a correctness issue (marked in a comment as a speed hack).

Not known to affect any games.
2023-11-30 22:40:36 +01:00
JosJuice ca7e05bbc4 Jit: Replace "msrBits" with "featureFlags"
Preparation for the next commit.
2023-11-30 22:40:32 +01:00
JosJuice b3bfcc5d7f PowerPC: Allow toggling write-back cache during emulation
Now that PR 10575 is merged, the JIT automatically clears its cache
when this setting is changed, making this reasonable to implement.
2023-10-31 19:43:49 +01:00
JosJuice ed7894924c Merge pull request #12048 from krnlyng/someothertest
Jit: Load the memory register only when the msr bits have changed and do not use jumps to load it.
2023-08-19 09:49:29 +02:00
Admiral H. Curtiss a34f221782 Core/PowerPC: Return AvailableCPUCores() as a std::span. 2023-08-16 19:25:03 +02:00
Franz-Josef Haider 8bfcd2deb7 JitArm64/Jit64: Load the memory register without jumps and only when necessary. 2023-07-28 14:24:53 +03:00
get 0948f0ef69 Fix PPCCache savestate behavior
PR #11183 regressed the lookup table reconstruction and, for some reason, added an else clause that clobbered the dCache whenever dCache emulation is turned on.
2023-04-23 00:53:01 -05:00
Admiral H. Curtiss 23843583bf PowerPC: Refactor to class, move to System. 2023-04-09 21:48:37 +02:00
Admiral H. Curtiss 18f8ae37ab PowerPC/Expression: Pass System to EvaluateCondition(). 2023-04-05 20:09:31 +02:00
Admiral H. Curtiss 8dabd1a025 PowerPC/MMU: Refactor to class, move to System. 2023-03-28 03:47:51 +02:00
Admiral H. Curtiss 9217a9eba4 JitInterface: Refactor to class, move to System. 2023-03-26 14:38:07 +02:00
Lioncash 0888c93d48 Common: Move FPU-related helpers into Common namespace
Makes these utilities' namespace consistent with the majority of the
Common library.
2023-03-21 10:58:13 -04:00
Admiral H. Curtiss 3d67c11b91 Interpreter: Move global state into class, move instance to System. 2023-03-19 03:05:20 +01:00
Admiral H. Curtiss 3b364c5c16 HW/CPU: Refactor to class, move to System. 2023-03-08 12:23:37 +01:00
Admiral H. Curtiss 8adabb86cf Debugger: Avoid ppcState global. 2023-01-27 15:22:45 +01:00
Admiral H. Curtiss 485bba238e PowerPC: Add PowerPCState parameter to UpdatePerformanceMonitor(). 2023-01-27 15:22:44 +01:00
Admiral H. Curtiss 61ba516570 PowerPC: Move a few functions to PowerPCState. 2023-01-27 15:22:44 +01:00
Admiral H. Curtiss 0dcf228aaf PowerPC: Parametrize TU macro. 2023-01-27 15:22:44 +01:00
Admiral H. Curtiss a7d3315b4f PowerPC: Parametrize TL macro. 2023-01-27 15:22:44 +01:00
Admiral H. Curtiss 2f8b3ac1b7 PowerPC: Parametrize SRR1 macro. 2023-01-27 15:22:43 +01:00
Admiral H. Curtiss 652113e6ba PowerPC: Parametrize SRR0 macro. 2023-01-27 15:22:43 +01:00
Admiral H. Curtiss 10dabd9975 PowerPC: Remove rDEC macro. 2023-01-27 15:22:43 +01:00
Admiral H. Curtiss 0a343007cb PowerPC: Parametrize LR macro. 2023-01-27 15:22:43 +01:00
Admiral H. Curtiss 0cd4a226d2 PowerPC: Remove rSPR macro. 2023-01-27 15:22:42 +01:00
Admiral H. Curtiss 8fccefa3aa PowerPC: Remove GPR macro. 2023-01-27 15:22:42 +01:00
Admiral H. Curtiss ba1b624e1b PowerPC: Remove MSR macro. 2023-01-27 15:22:42 +01:00
Admiral H. Curtiss 4b6b8fa1ae PowerPC: Remove FPSCR macro. 2023-01-27 15:22:41 +01:00
Admiral H. Curtiss 2f3187eba9 PowerPC: Remove NPC macro. 2023-01-27 15:22:41 +01:00
Admiral H. Curtiss be8d0b76ca PowerPC: Remove PC macro. 2023-01-27 15:22:41 +01:00
Admiral H. Curtiss 8bab3ac755 PowerPC: Parametrize MMCR1 macro. 2023-01-27 15:22:41 +01:00
Admiral H. Curtiss 126590c4cd PowerPC: Parametrize MMCR0 macro. 2023-01-27 15:22:40 +01:00
Admiral H. Curtiss 653e0ccf28 Merge pull request #11365 from iwubcode/cheat_manager_freeze_value
DolphinQt: add ability to lock / freeze values in the watches window
2023-01-09 18:41:28 +01:00