Yaya48
cf256aa081
Upstream: https://gitlab.com/qemu-project/qemu.git Upstream-Commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
27 lines
954 B
C
27 lines
954 B
C
/*
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* QEMU disassembler -- RISC-V specific header (xthead*).
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*
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* Copyright (c) 2023 VRULL GmbH
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef DISAS_RISCV_XTHEAD_H
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#define DISAS_RISCV_XTHEAD_H
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#include "disas/riscv.h"
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const rv_opcode_data *decode_xtheadba(rv_decode *, rv_isa);
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const rv_opcode_data *decode_xtheadbb(rv_decode *, rv_isa);
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const rv_opcode_data *decode_xtheadbs(rv_decode *, rv_isa);
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const rv_opcode_data *decode_xtheadcmo(rv_decode *, rv_isa);
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const rv_opcode_data *decode_xtheadcondmov(rv_decode *, rv_isa);
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const rv_opcode_data *decode_xtheadfmemidx(rv_decode *, rv_isa);
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const rv_opcode_data *decode_xtheadfmv(rv_decode *, rv_isa);
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const rv_opcode_data *decode_xtheadmac(rv_decode *, rv_isa);
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const rv_opcode_data *decode_xtheadmemidx(rv_decode *, rv_isa);
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const rv_opcode_data *decode_xtheadmempair(rv_decode *, rv_isa);
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const rv_opcode_data *decode_xtheadsync(rv_decode *, rv_isa);
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#endif /* DISAS_RISCV_XTHEAD_H */
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