IOS LLE: execute ARMv5TE enhanced DSP instructions (StarletOS phase 11 I1)

SMLAxy, SMLAWy, SMULWy, SMLALxy, SMULxy, QADD, QSUB, QDADD and QDSUB were
decoded as compare data processing that writes no register; the ARM926EJ-S
implements them. The interpreter now executes them with the Q flag and the
JIT leaves them to it. Adds ARMv5TEEnhancedDSPInstructions.

Co-Authored-By: Claude Opus 5.5 <[email protected]>

docs/StarletOS_Checkpoint.json

@@ -53,18 +53,18 @@
     },
     {
       "path": "Source/Core/Core/IOS/Starlet/ARMCore.cpp",
-      "sha256": "262946f1fb95250d1aa1ca73c9bc27ef5f83511731bf84c765a41b04fe7ff70a",
-      "bytes": 76503
+      "sha256": "2559d69e1ec654734f788312cf5f3dca4de63e22e0880626306e8d15a4585648",
+      "bytes": 80026
     },
     {
       "path": "Source/Core/Core/IOS/Starlet/ARMCore.h",
-      "sha256": "fa80b0d697e19f0aee178be4b13097ad5466f0bbd0cb9b3e7a74876c045b731f",
-      "bytes": 14647
+      "sha256": "c3263bebbbdb7cd1119cc74ad328a63ad969136c1755ccf8e06e6549f23da3aa",
+      "bytes": 14758
     },
     {
       "path": "Source/Core/Core/IOS/Starlet/ARMJitX64.cpp",
-      "sha256": "30ac3e6f74edd40a76406394ed40d66a1ca5b6b9a17b9699a1534d255320108f",
-      "bytes": 109425
+      "sha256": "724382f4f66442d51382d3249bea68620d7417a6c7f48b0c19efa60e942a183c",
+      "bytes": 109615
     },
     {
       "path": "Source/Core/Core/IOS/Starlet/ARMJitX64.h",
@@ -189,6 +189,15 @@
         "Source/Core/Core/IOS/Starlet/StarletMemory.cpp",
         "Source/Core/Core/IOS/Starlet/StarletMemory.h"
       ]
+    },
+    {
+      "recordedAt": "2026-10-06",
+      "purpose": "StarletOS Phase 11 proposal I1: the ARM interpreter executes the ARMv5TE enhanced DSP instructions (SMLAxy, SMLAWy, SMULWy, SMLALxy, SMULxy, QADD, QSUB, QDADD, QDSUB, Q flag), previously decoded as compare data processing that wrote no register; the JIT leaves them to the interpreter; test ARMv5TEEnhancedDSPInstructions",
+      "files": [
+        "Source/Core/Core/IOS/Starlet/ARMCore.cpp",
+        "Source/Core/Core/IOS/Starlet/ARMCore.h",
+        "Source/Core/Core/IOS/Starlet/ARMJitX64.cpp"
+      ]
     }
   ]
 }

docs/StarletOS_Handoff.md

@@ -212,3 +212,24 @@ the one it had just written, with no other Starlet store or device DMA seen.
 - `ARMCore.cpp` keeps its CRLF bytes. 95 Starlet tests passed. Companion
   smoke run (P11-H06D, 150 s): no DIFF, no AUDIT, 9 LDM with identical
   virtual and physical addresses.
+
+## ARMv5TE enhanced DSP instructions — 2026-10-06
+
+Companion proposal I1 (approved). The companion's Revolution kernel computes
+table addresses with `smlabb`; the ARM926EJ-S executes it, but
+`ARMCore::ExecuteARM` had no case for the ARMv5TE enhanced DSP instructions,
+so `smlabb` fell into data processing as `TST` (no destination written, flags
+changed). The kernel then read the wrong RAM-layer entry and refused a
+creation -106 ("system files corrupted" in the System Menu), in the fork only.
+
+- `ARMCore::ExecuteEnhancedDSP`: SMLAxy, SMLAWy, SMULWy, SMLALxy, SMULxy,
+  QADD, QSUB, QDADD, QDSUB, with the sticky Q flag (ARM Architecture
+  Reference Manual semantics), decoded before the generic decoders.
+- `CanEmitARMDataProcessing` excludes these encodings, so the JIT leaves them
+  to the interpreter.
+- Test `StarletARMCore.ARMv5TEEnhancedDSPInstructions`: eleven encodings from
+  GNU as (`-march=armv5te`), interpreter and JIT, results, Q and NZCV
+  untouched. 96 selected Starlet tests passed.
+- The companion's images use, besides these (16 `smlabb`, 4 `smulbb`), only
+  `blx`, `clz`, `ldrd`, `strd` among the ARMv5TE additions; those were
+  already handled.