IOS LLE: execute ARMv5TE enhanced DSP instructions (StarletOS phase 11 I1)
SMLAxy, SMLAWy, SMULWy, SMLALxy, SMULxy, QADD, QSUB, QDADD and QDSUB were decoded as compare data processing that writes no register; the ARM926EJ-S implements them. The interpreter now executes them with the Q flag and the JIT leaves them to it. Adds ARMv5TEEnhancedDSPInstructions. Co-Authored-By: Claude Opus 5.5 <[email protected]>
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@@ -212,3 +212,24 @@ the one it had just written, with no other Starlet store or device DMA seen.
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- `ARMCore.cpp` keeps its CRLF bytes. 95 Starlet tests passed. Companion
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smoke run (P11-H06D, 150 s): no DIFF, no AUDIT, 9 LDM with identical
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virtual and physical addresses.
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## ARMv5TE enhanced DSP instructions — 2026-10-06
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Companion proposal I1 (approved). The companion's Revolution kernel computes
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table addresses with `smlabb`; the ARM926EJ-S executes it, but
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`ARMCore::ExecuteARM` had no case for the ARMv5TE enhanced DSP instructions,
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so `smlabb` fell into data processing as `TST` (no destination written, flags
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changed). The kernel then read the wrong RAM-layer entry and refused a
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creation -106 ("system files corrupted" in the System Menu), in the fork only.
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- `ARMCore::ExecuteEnhancedDSP`: SMLAxy, SMLAWy, SMULWy, SMLALxy, SMULxy,
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QADD, QSUB, QDADD, QDSUB, with the sticky Q flag (ARM Architecture
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Reference Manual semantics), decoded before the generic decoders.
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- `CanEmitARMDataProcessing` excludes these encodings, so the JIT leaves them
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to the interpreter.
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- Test `StarletARMCore.ARMv5TEEnhancedDSPInstructions`: eleven encodings from
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GNU as (`-march=armv5te`), interpreter and JIT, results, Q and NZCV
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untouched. 96 selected Starlet tests passed.
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- The companion's images use, besides these (16 `smlabb`, 4 `smulbb`), only
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`blx`, `clz`, `ldrd`, `strd` among the ARMv5TE additions; those were
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already handled.
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