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Author SHA1 Message Date
MerryMage df08a77812 Jit_LoadStore: Ra needs to be ReadWrite when writeback is required 
This was an erronous change in 534db3b, Ra was previously loaded but was changed to not being loaded.
Why is loading necessary? Loading is necessary because when a memory exception occurs, the current
register values are flushed. This occurs before a new value is loaded into Ra, so the previous value
is required in Ra.
 2018-11-10 10:57:15 +00:00
MerryMage 342067abfa JitRegCache: Remove old interface 2018-10-28 17:57:46 +00:00
MerryMage 08c41090b2 JitRegCache: Add RegistersInUse 2018-10-28 17:57:46 +00:00
MerryMage 096392f295 JitRegCache: Add PreloadRegisters function 2018-10-28 17:57:46 +00:00
MerryMage 9f683f9bb1 BitSet: Add << operator 2018-10-28 17:57:46 +00:00
MerryMage e699b6b283 Jit: Remove OpArg variant of ComputeRC 2018-10-28 17:57:46 +00:00
MerryMage 7d7316c90f Jit_SystemRegisters: mffsx 2018-10-28 17:57:46 +00:00
MerryMage 62484141f2 Jit_SystemRegisters: mtfsfx 2018-10-28 17:57:46 +00:00
MerryMage 192f8ba6f1 Jit_Paired: ps_res 2018-10-28 17:57:46 +00:00
MerryMage 66d9349643 Jit_Paired: ps_rsqrte 2018-10-28 17:57:45 +00:00
MerryMage 3fc3a55a9a Jit_Paired: mergeXX 2018-10-28 17:57:45 +00:00
MerryMage cf5823c146 Jit_Paired: ps_muls 2018-10-28 17:57:45 +00:00
MerryMage 1550729688 Jit_Paired: ps_sum 2018-10-28 17:57:45 +00:00
MerryMage be8fec6244 Jit_Paired: ps_mr 2018-10-28 17:57:45 +00:00
MerryMage 96b86a9bc4 Jit_FloatingPoint: HandleNaNs 2018-10-28 17:57:45 +00:00
MerryMage 0a96da578e Jit_FloatingPoint: fresx 2018-10-28 17:57:45 +00:00
MerryMage e812a62879 Jit_FloatingPoint: frsqrtex 2018-10-28 17:57:45 +00:00
MerryMage 68bbd56c01 Jit_FloatingPoint: frspx 2018-10-28 17:57:45 +00:00
MerryMage cc77e2f3ef Jit_FloatingPoint: fctiwx 2018-10-28 17:57:45 +00:00
MerryMage 457327cbc4 Jit_FloatingPoint: FloatCompare 2018-10-28 17:57:45 +00:00
MerryMage 55c21a15a2 Jit_FloatingPoint: fmrx 2018-10-28 17:57:45 +00:00
MerryMage fecbf091e5 Jit_FloatingPoint: fselx 2018-10-28 17:57:45 +00:00
MerryMage d62ca40496 Jit_FloatingPoint: fsign 2018-10-28 17:57:45 +00:00
MerryMage 537eeb7ebf Jit_FloatingPoint: fmaddXX 2018-10-28 17:57:45 +00:00
MerryMage a26c9c4b74 Jit_FloatingPoint: fp_arith 2018-10-28 17:57:45 +00:00
MerryMage 2337e089bf Jit_SystemRegisters: mtspr 2018-10-28 17:57:45 +00:00
MerryMage d87436c57d Jit_LoadStorePaired: psq_lXX 2018-10-28 17:57:45 +00:00
MerryMage 0b29b5cb83 Jit_LoadStorePaired: psq_stXX 2018-10-28 17:57:45 +00:00
MerryMage 459f977483 Jit_LoadStoreFloating: stfiwx 2018-10-28 17:57:45 +00:00
MerryMage dcfe955087 Jit_LoadStoreFloating: stfXXX 2018-10-28 17:57:45 +00:00
MerryMage f564da7233 Jit_LoadStoreFloating: lfXXX 2018-10-28 17:57:45 +00:00
MerryMage 36790ad3ad Jit_SystemRegisters: mtcrf 2018-10-28 17:57:45 +00:00
MerryMage d8b2bf785a Jit_SystemRegisters: mfcr 2018-10-28 17:57:45 +00:00
MerryMage 6ff8f9e991 Jit_SystemRegisters: mfmsr 2018-10-28 17:57:45 +00:00
MerryMage 5fa6df8c1e Jit_SystemRegisters: mtmsr 2018-10-28 17:57:45 +00:00
MerryMage 1d867493d9 Jit_SystemRegisters: mfspr 2018-10-28 17:57:45 +00:00
MerryMage 9438ea0ef5 Jit_LoadStore: stmw 2018-10-28 17:57:45 +00:00
MerryMage 98cf0b3286 Jit_LoadStore: lmw 2018-10-28 17:57:45 +00:00
MerryMage c6b9712ac4 Jit_LoadStore: stXx 2018-10-28 17:57:44 +00:00
MerryMage 90cef22d57 Jit_LoadStore: stX 2018-10-28 17:57:44 +00:00
MerryMage 4a2efc8f5e Jit_LoadStore: dcbz 2018-10-28 17:57:44 +00:00
MerryMage 0e501e5c36 Jit_LoadStore: dcbx 2018-10-28 17:57:44 +00:00
MerryMage 534db3b2ed Jit_LoadStore: lXXx 2018-10-28 17:57:44 +00:00
MerryMage 00d65f7a69 Jit: memcheck 2018-10-28 17:57:44 +00:00
MerryMage c896d41c37 DoJit 2018-10-28 17:57:44 +00:00
MerryMage 4443b36326 Jit_Branch: bclrx 2018-10-28 17:57:44 +00:00
MerryMage 0cd85bbce7 Jit_Branch: bcctrx 2018-10-28 17:57:44 +00:00
MerryMage 453417ad8c Jit_Branch: bcx 2018-10-28 17:57:44 +00:00
MerryMage 256e234949 Jit_Integer: DoMergedBranchCondition 2018-10-28 17:57:44 +00:00
MerryMage 0d3393b306 Jit_Integer: rlwimix 2018-10-28 17:57:44 +00:00
MerryMage b866b5bdd9 Jit_Integer: reg_imm 2018-10-28 17:57:44 +00:00
MerryMage ace2ed27ac Jit_Integer: DoMergedBranchImmediate 2018-10-28 17:57:44 +00:00
MerryMage 88e5d0d8b1 Jit_Integer: cmpXX 2018-10-28 17:57:44 +00:00
MerryMage b256286690 Jit_Integer: boolX 2018-10-28 17:57:44 +00:00
MerryMage b7a4296bec Jit_Integer: extsXx 2018-10-28 17:57:44 +00:00
MerryMage c380764ed0 Jit_Integer: twX 2018-10-28 17:57:44 +00:00
MerryMage 5621907283 Jit_Integer: cntlzwx 2018-10-28 17:57:44 +00:00
MerryMage 31bd9b5cd0 Jit_Integer: srawix 2018-10-28 17:57:44 +00:00
MerryMage 817fddf734 Jit_Integer: srawx 2018-10-28 17:57:44 +00:00
MerryMage 32572dd639 Jit_Integer: slwx 2018-10-28 17:57:44 +00:00
MerryMage 22600b33ee Jit_Integer: srwx 2018-10-28 17:57:44 +00:00
MerryMage 4a97f31aa2 Jit_Integer: negx 2018-10-28 17:57:44 +00:00
MerryMage 42614ede16 Jit_Integer: rlwnmx 2018-10-28 17:57:44 +00:00
MerryMage d4e2acc9cd Jit_Integer: rlwinmx 2018-10-28 17:57:44 +00:00
MerryMage bde5df03a3 Jit_Integer: arithcx 2018-10-28 17:57:44 +00:00
MerryMage 6ce718b920 Jit_Integer: arithXex 2018-10-28 17:57:44 +00:00
MerryMage 9bf75a0f31 Jit_Integer: addx 2018-10-28 17:57:44 +00:00
MerryMage 50e7b97406 Jit_Integer: divwx 2018-10-28 17:57:44 +00:00
MerryMage f945457915 Jit_Integer: divwux 2018-10-28 17:57:44 +00:00
MerryMage 2652d4dfdb Jit_Integer: mulhwXx 2018-10-28 17:57:44 +00:00
MerryMage 24aadd933e Jit_Integer: mullwx 2018-10-28 17:57:44 +00:00
MerryMage 02deaab6ee Jit_Integer: mulli 2018-10-28 17:57:44 +00:00
MerryMage 497ac5789d Jit_Integer: subfx 2018-10-28 17:57:44 +00:00
MerryMage 64c29ab942 Jit_Integer: Port subfic to new register cache interface 2018-10-28 17:57:44 +00:00
MerryMage 33812319ac Jit: Add preg_t variant of ComputeRC 2018-10-28 17:57:44 +00:00
MerryMage 5e46c16e4f JitRegCache: Add IsZero to RCOpArg 2018-10-28 17:57:43 +00:00
MerryMage 2e955012b2 JitRegCache: Add BindOrImm 2018-10-28 17:57:43 +00:00
MerryMage 590ec866b0 JitRegCache: Add revertable binds 2018-10-28 17:57:43 +00:00
MerryMage 16f8b7413d JitRegCache: IsAllUnlocked 2018-10-28 17:57:43 +00:00
MerryMage 6c61d9a426 JitRegCache: RCForkGuard 2018-10-28 17:57:43 +00:00
MerryMage 367a0bb672 JitRegCache: Add RCOpArg::ExtractWithByteOffset 2018-10-28 17:57:43 +00:00
MerryMage ae1bd7a6b0 JitRegCache: New interface 2018-10-28 17:57:43 +00:00
MerryMage 6fef683e14 JitRegCache: Move files to subdirectory 2018-10-28 17:57:43 +00:00
MerryMage 448fc89e4c JitRegCache: Count locks/unlocks 2018-10-28 17:57:43 +00:00
MerryMage 2dce7e6e21 Common: Add variant utilities 2018-10-28 17:57:43 +00:00
MerryMage 688e8db904 BTReal: Correct comparison of integers of different signs 2018-10-15 19:30:58 +01:00
MerryMage 93ec976975 Jit_SystemRegisters: Correct behaviour for mtspr SPR_HID0 (Redux) 
* BTR modifies its argument.
* Do not fallthrough.
 2018-10-13 19:20:08 +01:00
MerryMage e7a65c31a8 Jit_SystemRegisters: Correct behaviour for mtspr SPR_HID0 
BTR modifies its argument
 2018-10-13 15:59:40 +01:00
MerryMage d60345f15e Jit_FloatingPoint: Make fp_tri_op a local lambda 2018-10-12 20:46:02 +01:00
MerryMage 8e3846d844 Jit_LoadStore: Name indexed condition 
inst.OPCD == 31 represents an indexed instruction
 2018-10-07 20:29:47 +01:00
MerryMage d448ed3308 JitRegCache: Fix SanityCheck 2018-10-07 11:48:06 +01:00
MerryMage d5999bc0df JitRegCache: Rename CachedReg function names 
* BoundTo -> SetBoundTo
* Flushed -> SetFlushed
* Remove argument from MakeDirty
 2018-10-07 11:48:06 +01:00
MerryMage 29d301e303 JitRegCache: Use preg_t for PPC register indexes 2018-10-07 11:48:06 +01:00
MerryMage d9e2b3ed98 JitRegCache: Make {Store,Load}Register protected 
No reason for them to be public
 2018-10-07 11:48:06 +01:00
MerryMage 66c3d1e183 JitRegCache: Remove FlushR 
No external users.
 2018-10-07 11:48:05 +01:00
MerryMage ba33e1e69b JitRegCache: Simplify ASSERTs 2018-10-07 11:48:05 +01:00
MerryMage ff0a6b8331 JitRegCache: Encapsulate behavior of X64CachedReg 2018-10-06 19:27:56 +01:00
MerryMage dd41bab365 JitRegCache: Encapsulate behavior of PPCCachedReg 2018-10-06 19:27:56 +01:00
MerryMage 89a0b0de32 Jit64AsmCommon: Reduce branches in fast-path and inline most behavior 
The only behavior requires a function call is denormal behaviour. We also fix fpscr exception raising.
 2018-09-28 18:11:30 +01:00
MerryMage 826bcad3a5 UnitTets: Add tests for frsqrte 2018-09-28 18:11:30 +01:00