Commit Graph
16 Commits
Author SHA1 Message Date
Sintendo defb2d65a6 JitArm64_SystemRegisters: Use ScopedARM64Reg 2024-10-21 08:33:05 +02:00
Sintendo be2b466743 JitArm64_Paired: Use ScopedARM64Reg 2024-10-21 08:33:05 +02:00
Sintendo 3b251dbb2a JitArm64_LoadStorePaired: Use ScopedARM64Reg 2024-10-21 08:33:05 +02:00
Sintendo 23327064f6 JitArm64_LoadStoreFloating: Use ScopedARM64Reg 2024-10-21 08:33:05 +02:00
Sintendo 9420250046 JitArm64_LoadStore: Use ScopedARM64Reg 2024-10-21 08:33:05 +02:00
Sintendo ac3d3de66d JitArm64_FloatingPoint: Use ScopedARM64Reg 2024-10-21 08:33:05 +02:00
Sintendo 9805a8ac0a JitArm64_Branch: Use ScopedARM64Reg 2024-10-21 08:33:05 +02:00
Sintendo cb29a29866 JitArm64: Use ScopedARM64Reg 2024-10-21 08:33:05 +02:00
Sintendo c0a0746d65 JitArm64_Integer: Use ScopedARM64Reg 2024-10-21 08:33:05 +02:00
Sintendo 62e1d7ad99 JitArm64: Add ScopedARM64Reg 2024-10-21 08:23:23 +02:00
Sintendo a9a779a6b9 JitArm64_Integer: Use IsImm helper more 2024-10-10 22:21:31 +02:00
Sintendo 0d9984b299 JitArm64_SystemRegisters: Optimize mtspr
No need to materialize the immediate if it is zero, we can just use WZR.

Before:
mov    w27, #0x0                 ; =0
str    w27, [x29, #0x1178]

After:
str    wzr, [x29, #0x1178]
2024-10-10 22:16:28 +02:00
Sintendo 8304ae3361 JitArm64_RegCache: Add IsImm helper
Because checking if a register is a specific immediate is a rather
common operation.
2024-10-10 22:13:34 +02:00
Sintendo 9af7772d91 JitArm64_Paired: Remove unused temp_gpr from ps_arith 2024-06-30 09:54:09 +02:00
Sintendo 0e58b3cfb7 JitArm64_FloatingPoint: Remove unused temp_gpr from fp_arith 2024-06-30 09:53:48 +02:00
Sintendo d877cfa4e2 JitArm64_Integer: Optimize subfic for zero
When the immediate value is zero, we can do a negation. On ARM64 the NEG
/NEGS instructions are just an alias for SUB/SUBS with a hardcoded WZR.

Before:
```
ldr    w22, [x29, #0x28]
mov    w21, #0x0                 ; =0
subs   w22, w21, w22
```

After:
```
ldr    w22, [x29, #0x28]
negs   w22, w22
```
2024-06-29 23:08:02 +02:00