Commit Graph
20 Commits
Author SHA1 Message Date
dok.slade 55d7f93e0c Revert r6076 and r6077 since they broke x64 builds
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6080 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-08-09 19:00:24 +00:00
dok.slade 244191f18f Fixed some mistakes from r6076:
* Fixed missing UnlockAllX
* Fixed 64-bits compilation

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6077 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-08-08 18:53:00 +00:00
dok.slade 5a248b46a1 JIT compiler:
* Improved constants folding in load instructions
* Merged load instructions
* Fixed the register allocator so that it can restore the registers state after jumping to the dispatcher (in case of a conditional jump)

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6076 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-08-08 18:12:58 +00:00
dok.slade 1faff6aeb7 JIT compiler:
* Improved constant folding/propagation in integer instructions
* Merged boolean instructions

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6063 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-08-06 19:35:40 +00:00
dok.slade 7a80e8e409 Added missing unlocks from r6053 (thanks mylek4)
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6055 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-08-04 23:30:47 +00:00
dok.slade 9b6180ab27 Fixed JIT register allocator.
Now it only writes back dirty registers when flushed
	* Fixed KillImmediate
	* Renamed LoadToX64 and StoreFromX64 to BindToRegister and StoreFromRegister respectively (as suggested by ector)
	* Code cleanup in calls to the reg allocator


git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6053 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-08-04 19:34:47 +00:00
dok.slade c88689381f Merged JIT crXXX instructions (thanks XTra.KrazzY)
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6012 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-31 10:29:08 +00:00
dok.slade 12be9952ab Implemented more JIT instructions
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6008 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-30 21:28:20 +00:00
dok.slade a72339b086 Work on JIT branches part #2/2:
* Code cleanup
* Reduce the cost of RFI instruction (heavily used on PowerPC)
* Implement missing cases in bclrx

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5991 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-28 21:24:23 +00:00
dok.slade f09c5ad6c1 Work on JIT branches part #1/2:
Try to merge cmpXX with all types of conditional branches (not only bcx)

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5990 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-28 21:21:30 +00:00
dok.slade 99ffecd675 Merge JIT instructions when loading 32-bits immediate values :
PowerPC needs 2 instructions to load a 32-bits immediate value in a register (lis + addi; lis + ori). We can merge both instructions into a single SetImmediate().
This commit shares code with r5799, so to prevent another flame war on OSX vs Windows, I added #ifdef around the "bad" lines...


git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5982 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-26 23:06:34 +00:00
dok.slade d340b9497e Commit r5970 part #5: Removed unneeded MOV in branch instructions
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5977 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-25 19:10:50 +00:00
dok.slade 673f18837b Commit r5970 part #4: Merge some loops in PPCAnalyst::Flatten()
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5976 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-25 19:01:32 +00:00
dok.slade 16129f6f6d Commit r5970 part #3.1: Forgot to remove code unused since r5974
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5975 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-25 18:52:02 +00:00
dok.slade c7b4df19d7 Commit r5970 part #3: Inline the call to computeCR: it now costs a few more memory bytes per JITed instruction but it removes the CPU overhead of the CALL. This allowed to remove some unneeded MOV as well.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5974 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-25 18:44:34 +00:00
dok.slade cba42fab1d Commit r5970 part #2: Jit64::GenerateCarry() don't need a temporary register anymore
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5973 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-25 18:14:48 +00:00
dok.slade 68c8f345d7 Commit r5970 part #1: Fix what seems to be a bug in PowerPC instruction RFI: the wrong bit was cleared in MSR
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5972 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-25 18:03:14 +00:00
dok.slade fa2cfcd089 Revert r5970 before committing again part by part (except modifications about CR union)
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5971 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-25 17:54:03 +00:00
dok.slade cbc66f9467 More performance work on the PowerPC JIT compiler:
* Merge some loops in PPCAnalyst::Flatten()
* Put ppcState.cr and ppcState.cr_fast[] into a single C++ union. This allows quick access to the whole CR register without needing to merge the cr_fast array. The implemented solution assumes the host system is little-endian, but it seems to be already assumed in many places in the code...
* Inline the call to computeCR: it now costs a few more memory bytes per JITed instruction but it removes the CPU overhead of the CALL. This allowed to remove some unneeded MOV as well.
* Jit64::GenerateCarry() don't need a temporary register anymore
* Fix what seems to be a bug in PowerPC instruction RFI: the wrong bit was cleared in MSR

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5970 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-25 15:37:56 +00:00
dok.slade f8ce075ab1 Commit patch submitted in issue 2951 (PowerPC JIT optimizations)
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5954 8ced0084-cf51-0410-be5f-012b33b47a6e
2010-07-23 19:30:00 +00:00