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Author SHA1 Message Date
Fiora 40b18f09b2 JIT: use LZCNT in cntlzw 2014-09-14 05:36:23 -07:00
Fiora 997c5c2d0e x64Emitter: add LZCNT/TZCNT support and detection 
Also add a unit test.
 2014-09-14 05:31:22 -07:00
Fiora 9d2b2cae4a JIT: fix JIT with conditional continue off, again 2014-09-14 00:12:27 -07:00
Fiora 1bd8d1ee98 Add immediate tests for WriteNormalOp 
also fix a bug in Bochs that was preventing adc from passing.
 2014-09-13 16:39:34 -07:00
Fiora 32a67ef264 JIT: fix memcheck on float load/store, plus some corner cases 2014-09-13 13:53:19 -07:00
Fiora b3c1cec197 JIT: fix memcheck with stXx 2014-09-13 13:53:18 -07:00
Fiora 9a19314969 JIT: make memcheck macro support an inverted mode 2014-09-13 13:53:13 -07:00
Fiora 54e26f64c6 JIT: use far code emitter in more places 2014-09-13 13:51:12 -07:00
Fiora c5381bae66 JIT: add "far code emitter" to reduce L1I cache pressure 2014-09-13 02:31:31 -07:00
Fiora 09a62505c5 JIT: support paired load/store with MMU on 
Also change the calling convention, to avoid RSCRATCH being clobbered by
memcheck'd loads.
 2014-09-13 02:18:11 -07:00
Fiora 2661bc151a JIT memcheck: don't flush register state unless an exception occurs 2014-09-12 20:55:00 -07:00
Fiora 18d83a310e X64Emitter: support shorter mov reg, imm opcodes 
Also refactor WriteNormalOp a little bit and add comments.
 2014-09-11 11:40:30 -07:00
Fiora 5726e0cdfb JIT: use XCHG in MOVTwo 
Roughly the same speed or slightly faster depending on CPU; mostly just cleaner
since we don't have to pass in a temp.
 2014-09-10 22:17:38 -07:00
Fiora b3a57ff396 JIT: remove op merging code that served no purpose 
Dolphin already tracks propagation of immediates, so this code didn't really do
anything useful.
 2014-09-09 18:09:23 -07:00
Fiora 0af1352020 JIT: fix running in debug mode 
Regression in 7fb6628.
 2014-09-08 21:11:41 -07:00
Fiora 8fc57d61ba JIT64: support merged branching for rlwinmx, too 
Not quite as common a branch instruction as cmpwi, but close.
 2014-09-08 20:16:41 -07:00
Fiora b56117de05 JIT64: optimize some special cases of srawix 
Shift by 31 and 1, both of which are pretty common, can be done in a few less
instructions. Tested with a hwtest.
 2014-09-08 20:15:49 -07:00
Fiora a95d8cbcb4 JIT64: optimize carry handling 
Carries are rather common and unpredictable, so do them branchlessly wherever
we can.
 2014-09-08 20:15:49 -07:00
Fiora a570c6b4a4 JIT64: tweak srwx/slwx BindToRegister arguments 
Register B gets immediately moved into the shift register, so even if a == b
it doesn't need to be loaded.
 2014-09-08 20:15:49 -07:00
Fiora 5b77617069 JIT64: use LEA for the "a = b + imm" case of addi 2014-09-08 20:15:48 -07:00
Fiora 9977da0550 JIT64: avoid using LEA for adds when not necessary 2014-09-08 20:15:48 -07:00
Fiora 298f85e152 JIT64: optimize sign-extend 
Remove some code duplication.

Also remove some comments that no longer apply since x86_32 was dropped.
 2014-09-08 20:15:47 -07:00
Fiora faf6bdfd96 JIT64: Optimize cmpXX 
Use TEST instead of CMP if we're comparing against 0 (rather common), and
optimize the case of immediate compares further.
 2014-09-08 20:15:47 -07:00
Fiora de662a79b7 JIT64: optimize rlwinmx/rlwinix and friends 
Take advantage of movzx as a replacement for anding with 0xff or 0xffff, and
abuse loads from the register cache to save ops.
 2014-09-08 20:15:46 -07:00
Fiora 858296e1c7 JIT64: optimize multiplication by immediate constants 
Factor out common code and handle a few more common cases.
 2014-09-08 20:15:46 -07:00
Fiora 94c20db369 Rename Log2 and add IsPow2 to MathUtils for future use 
Also remove unused pow2/pow2f functions.
 2014-09-08 20:15:45 -07:00
Fiora ce494a5e4f JIT: fix a corner case in crXXX 
It didn't behave correctly with an input of zero, resulting in some games
breaking (at the least, Fight Night 2). This should be fixed now.

Also clean it up, add a few comments, and fix some variants of the instruction
that are so rare that they probably never got tested.
 2014-09-08 04:16:50 -07:00
Fiora 3855396422 JIT: fix conditional-continue=off 2014-09-08 00:28:56 -07:00
Fiora 4ec8f83a1a JIT: fix branch merging with bclr 2014-09-05 13:58:06 -07:00
Fiora 801153301f Remove debug printf from earlier commit 2014-09-05 10:31:29 -07:00
Fiora 07e0c917c6 Revert "JIT64: optimize CA calculations" 2014-09-05 10:26:30 -07:00
Fiora 2f9e9bf1fc JIT: completely inline timer reading 
Should be a bit faster on games that heavily use the timer.
 2014-09-04 21:55:36 -07:00
Fiora a63b9f6713 JIT: remove srawix fallback 
As far as I can tell, this has literally been here since the start of the git
history; maybe it was stubbed out because the author wasn't sure it was right?

It matches the PPC/Broadway manuals perfectly, though.
 2014-09-03 23:39:52 -07:00
Fiora 068b5c26f4 JIT: fix regression in timer patch 2014-09-03 14:36:38 -07:00
Fiora 1b50f9df14 JIT: implement fres 
Mostly a straightforward translation of the interpreter code, with a few
tricksy optimizations and fallbacks for rare paths.
 2014-09-03 12:15:30 -07:00
Fiora c72a133206 JIT: implement frsqrte 
Mostly a straightforward translation of the interpreter code, with a few
tricksy optimizations and fallbacks for rare paths.
 2014-09-03 11:21:04 -07:00
Fiora 5088a2b4e2 x64Emitter: add BMI1/BMI2 support 
TZCNT and LZCNT use a completely different encoding scheme, so they should
probably go in a separate patch.

Also add some tests.
 2014-09-03 10:04:01 -07:00
Fiora 9e4419e786 x64Emitter: add support for shorter EAX forms of instructions 
Should save a few bytes of code size here and there.
 2014-09-02 21:52:41 -07:00
Fiora 6875d911f1 JIT: merge paired timebase reads where possible 
Combined with the previous patch, ~1% faster overall on F-Zero GX.
 2014-09-02 21:49:24 -07:00
Fiora 816d056657 JIT: implement timer support in mtspr 
Faster, of course, since we avoid the interpreter, but also means we can
get more a more accurate timer in long blocks by adding the offset from the
start of the block to the retrieved timer. I don't know if this will actually
fix any issues, but it's more correct and a nearly-free improvement.
 2014-09-02 21:47:45 -07:00
Fiora 6655c7775e JIT: Fix callee-save registers on WIN64 2014-09-02 10:56:14 -07:00
Fiora 3aa40dab00 JIT64: optimize carry calculations 
Omit carry calculations that get overwritten later in the block before they're
used. Very common in the case of srawix and friends.
 2014-09-01 20:41:48 -07:00
Fiora a40278b1c4 JIT64: support merged branching for rlwinmx, too 
Not quite as common a branch instruction as cmpwi, but close.
 2014-09-01 20:41:12 -07:00
Fiora 10d691a277 JIT64: optimize some special cases of srawix 
Shift by 31 and 1, both of which are pretty common, can be done in a few less
instructions. Tested with a hwtest.
 2014-09-01 20:41:12 -07:00
Fiora 805be80f12 JIT64: Optimize carry handling 
Carries are rather common and unpredictable, so do them branchlessly wherever
we can.
 2014-09-01 20:41:11 -07:00
Fiora ee24d4714a JIT64: tweak srwx/slwx BindToRegister arguments 
Register B gets immediately moved into the shift register, so even if a == b
it doesn't need to be loaded.
 2014-09-01 20:41:11 -07:00
Fiora ad51fc7c4b JIT64: use xor instead of mov for loading a zero regcache immediate 2014-09-01 20:41:10 -07:00
Fiora 27996a65cf JIT64: use LEA for the "a = b + imm" case of addi 2014-09-01 20:41:10 -07:00
Fiora cd0c52b537 JIT64: avoid using LEA for adds when not necessary 2014-09-01 20:41:10 -07:00
Fiora 355850f499 JIT64: optimize sign/zero-extend 
Also remove some comments that no longer apply since x86_32 was dropped.
 2014-09-01 20:41:09 -07:00
Fiora 61af91ff16 JIT64: Optimize cmpXX 
Use TEST instead of CMP if we're comparing against 0 (rather common), and
optimize the case of immediate compares further.
 2014-09-01 20:41:09 -07:00
Fiora 41c3dde737 JIT64: optimize rlwinmx/rlwinix and friends 
Take advantage of movzx as a replacement for anding with 0xff or 0xffff, and
abuse loads from the register cache to save ops.
 2014-09-01 20:41:08 -07:00
Fiora 58dc802ce2 JIT64: optimize multiplication by immediate constants 
Factor out common code and handle a few more common cases.
 2014-09-01 20:41:08 -07:00
Fiora b51aa4fa89 Rename Log2 and add IsPow2 to MathUtils for future use 
Also remove unused pow2/pow2f functions.
 2014-09-01 20:41:07 -07:00
Fiora 08ab2d3110 MMU: fix enhanced BAT support 
I don't know what I can test this on, but it was definitely broken before.
Seems to be a few clock cycles faster too due to the refactoring?
 2014-08-30 05:47:05 -07:00
Fiora 1ed6be12b9 JIT: revert lmw optimizations 
This seems to break Star Wars Rogue Leader and I have no idea why, so for the
meantime I'm just going to revert it since it's not very important.
 2014-08-30 04:17:48 -07:00
Fiora 6f617c4175 JIT64: try enabling dcbz again 
This time, check the address carefully beforehand, since apparently some games
do horrible things like running it on non-RAM addresses, or at the very least
virtual addresses.
 2014-08-29 12:19:58 -07:00
Fiora 88095a607a JIT: fix RAM check in load-from-constant-address 
A bug that seems to have been uncovered by allowing immediate-address loads.
Super Monkey Ball 2 crashes without this change -- it's possible, however, that
the game actually requires the MMU hack, since it crashed due to accessing an
address in the 0x20000000-0x3fffffff range.
 2014-08-28 12:54:23 -07:00
Fiora c359d65dfe JIT64: add frspx implementation 2014-08-28 11:40:31 -07:00
Fiora 7929f2f033 JIT: make fprf conditional in fcmp, just like the other instructions 
Missed in the FPRF merge (it didn't break anything, but it's probably a bit
slower and not consistent with the others).
 2014-08-28 11:19:09 -07:00
Fiora 043256449e Jit64: some load/store optimizations 
Avoid extra ops during address calculation in loads; use LEAs or immediates
whenever possible.
 2014-08-28 10:12:55 -07:00
Fiora f9d4ff0d5d x64Emitter: add support for some missing CVT instructions 2014-08-27 20:15:42 -07:00
Fiora 7e07acbf3f Fix another absent-minded typo in the fmul interpreter patch 2014-08-26 23:00:11 -07:00
Fiora 1a0a33518b Bugfixes for fmul rounding 
Fix the places I forgot to add Force25Bit, and fix an incredibly silly typo bug
 2014-08-26 21:37:45 -07:00
Fiora 7dbc623dc0 JIT: Initial FPRF support 
Doesn't support all the FPSCR flags, just the FPRF ones.
Add PPCAnalyzer support to remove unnecessary FPRF calculations.

POV-ray benchmark with enableFPRF forced on for an extreme comparison:
Before: 1500s
After, fmul/fmadd only: 728s
After, all float: 753s

In real games that use FPRF, like F-Zero GX, FPRF previously cost a few percent
of total runtime.

Since FPRF is so much faster now, if enableFPRF is set, just do it for every
float instruction, not just fmul/fmadd like before. I don't know if this will
fix any games, but there's little good reason not to.
 2014-08-26 10:57:03 -07:00
Fiora 288babf414 PPCFP: add comment 2014-08-26 09:08:22 -07:00
Fiora 90324f3809 JIT64: add mulhwx implementation 2014-08-26 01:09:04 -07:00
Fiora aaca1b01e5 JIT64: clean up and unify float load/store code 
While we're at it, support a bunch of float load/store variants that weren't
implemented in the JIT. Might not have a big speed impact on typical games but
they're used at least a bit in povray and luabench.

694 -> 644 seconds on povray.
 2014-08-25 19:51:40 -07:00
Fiora f04e362721 JIT: fix incredibly silly mistake in fmul rounding patch 2014-08-25 10:10:28 -07:00
Fiora 4d7b1275c9 Interpreter: apply the same odd rounding to single multiplies as the JIT 2014-08-24 10:28:52 -07:00
Fiora 4f18f6078f JIT64: Fix fmul rounding issues 
Thanks to magumagu's softfp experiments, we know a lot more about the Wii's
strange floating point unit than we used to. In particular, when doing a
single-precision floating point multiply (fmulsx), it rounds the right hand
side's mantissa so as to lose the low 28 bits (of the 53-bit mantissa).

Emulating this behavior in Dolphin fixes a bunch of issues with games that
require extremely precise emulation of floating point hardware, especially
game replays. Fortunately, we can do this with rather little CPU cost; just ~5
extra instructions per multiply, instead of the vast load of a pure-software
float implementation.

This doesn't make floating-point behavior at all perfect. I still suspect
fmadd rounding might not be quite right, since the Wii uses fused instructions
and Dolphin doesn't, and NaN/infinity/exception handling is probably off in
various ways... but it's definitely way better than before.

This appears to fix replays in Mario Kart Wii, Mario Kart Double Dash, and
Super Smash Brothers Brawl. I wouldn't be surprised if it fixes a bunch of
other stuff too.

The changes to instructions other than fmulsx may not be strictly necessary,
but I included them for completeness, since it feels wrong to fix some
instructions but not others, since some games we didn't test might rely on
them.
 2014-08-24 10:28:52 -07:00
Fiora ce6d09ca5d Add AVX2/BMI1/BMI2 detection support 
Also clean up the formatting in a bit of the CPU detection code.
 2014-08-24 09:14:54 -07:00
Fiora 59c1a46ab1 JIT: faster PPC_FP code 
The PPC_FP conversion code can be made a lot simpler with the observation
that the only values that need to be sent through the slow x87 path are
denormals.

A whole bunch faster: 708->678 seconds on POV-RAY.
 2014-08-23 07:44:42 -07:00
Fiora 5c0145f71b PPCAnalyzer: move num_instructions initialization to correct place 
Much of the PPC Analyzer code (e.g. instruction reordering for merging
branches) wasn't actually being run.
 2014-08-21 11:19:23 -07:00
Fiora a1655a0e3c JIT: avoid saving the PC on every store 
Modify the backpatcher to store the PC in the trampolines.
Should be ~3.5% faster overall (measured on POV-RAY benchmark).
 2014-08-19 02:08:53 -07:00
Fiora 1a36210093 JIT: cleanup unnecessary immedate size-checking logic 
We do this in the emitter now, so this code isn't needed anymore.
 2014-08-18 08:20:46 -07:00
Fiora 802b28daf9 x64Emitter: refactor to support longer opcodes 
Also add some new SSE4 opcodes.
 2014-08-17 04:48:17 -07:00
Fiora 75279881cc JIT: flush *after* the merged branch, not before 
More correct and should avoid lots of redundant stores.
 2014-08-17 00:02:00 -07:00
Fiora a317dac089 Debugger: fix JIT block viewer PPC view 
The JIT block compare code didn't set the same options for the PPCAnalyzer
as the actual JIT did, which made the PPC side of the JIT block viewer stop
at the first branch instead of the end of the block.
 2014-08-16 22:25:49 -07:00
Fiora 1cb50c9609 JIT64: faster implementation of mtcrf and mcrxr 2014-08-15 14:09:28 -07:00
Fiora c936984c96 JIT64: faster + branchless crxxx 2014-08-15 14:09:28 -07:00
Fiora 8c71703098 JIT64: faster implementation of mfcr 2014-08-15 14:09:27 -07:00
Fiora 1669b361a2 JIT: don't rely on undefined behavior for constant overflow checking 
I have no idea what the compiler does with these, and this code probably
isn't triggered in most games, but it's probably better not to taunt the
undefined behavior demon.
 2014-08-15 11:26:10 -07:00
Fiora 56cc0227c3 Debugger: fix blowup calculation again 
Wasn't quiiite right in 3c2567 either.
 2014-08-15 10:24:35 -07:00
Fiora 290643ad25 Externals: update Bochs to newer version 
Should resolve the disassembler not handling all the opcodes Dolphin generates.
 2014-08-15 00:44:37 -07:00
Fiora 6741cdbe84 Debugger: fix blowup calculation 2014-08-14 13:40:34 -07:00
Fiora 97beea1963 JIT: Don't needlessly flush register state in merged integer+branch code 
The actual branch code doesn't flush the register state, so it doesn't make
much sense for the merged optimization to do so either.
 2014-08-14 09:55:11 -07:00
Fiora a4b23d80b7 JIT: correctly set skipNext even if conditional-continue is off 
Part 2: I missed the other branch-merging case in the first commit.
 2014-08-14 09:31:35 -07:00
Fiora c1f7b0ddc9 Debugger: make "PPC to x86" open JIT window 
The button just silently did nothing if the window wasn't open, with no hint
as to how to make it work.
 2014-08-14 08:37:33 -07:00
Fiora 75cc8917a1 JIT: correctly set skipNext even if conditional-continue is off 2014-08-14 07:57:55 -07:00
Fiora 75b3e425fd x64Emitter: optimize immediate sizes 
A nice alternative than trying to do it throughout the JIT.
 2014-08-07 13:07:27 -04:00
Fiora 047cf23f51 JIT64: correctly sign-extend immediate RC values 2014-08-06 14:21:56 -04:00
Fiora 133e04541a JIT: Don't assume the reserved bits in GQRs are zero 
While the unused bits in the GQR SPR are probably not supposed to be set, some
games set them anyways (e.g. Dirt 2), which broke the JIT code.
 2014-08-04 14:22:00 -04:00
Fiora c9be85b079 Fix quant/dequant table bug 
1<<31 is not 2^31 because 1 is a signed int in C; this bug affected both the
JIT and interpreter quantized store implementations, though I don't know if
any games were actually affected.
 2014-08-04 10:08:42 -04:00