Commit Graph
2 Commits
Author SHA1 Message Date
Bram Speeckaert 4914ff25d6 JitArm64: boolX constant optimizations
A (partial) port of #9481 to ARM64. This commit adds special cases for
immediate values equal to 0 or 0xFFFFFFFF, allowing for more efficient
or no code to be generated.
2022-09-25 14:58:26 +02:00
Bram Speeckaert 9d73583ea3 JitArm64: Skip redundant imm to register writes
When a guest register is an immediate, it may be necessary to move this
value into a register. This is handled by gpr.R(), which lacks context
on how the register will be used. This leads to cases where the
immediate is written to a register, only for it to be overwritten. Take
for example this code generated by srwx:

0x5280031b   mov    w27, #0x18
0x53187edb   lsr    w27, w22, #24

gpr.BindToRegister() does have this context through the do_load
parameter, but didn't handle immediates. By adding this logic, we can
intelligently skip the write when do_load is false.
2022-09-25 10:04:51 +02:00