SMLAxy, SMLAWy, SMULWy, SMLALxy, SMULxy, QADD, QSUB, QDADD and QDSUB were
decoded as compare data processing that writes no register; the ARM926EJ-S
implements them. The interpreter now executes them with the Q flag and the
JIT leaves them to it. Adds ARMv5TEEnhancedDSPInstructions.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
Reads and IPC-reply audits compare each watched range with what the
Starlet and the devices wrote, revealing other writers; register-list
transfers in a watched virtual range log their translation.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
Logs Starlet CPU stores (instruction address, LR) and device DMA writes
in the given physical ranges. The ARM JIT keeps fastmem but sends accesses
overlapping a watched range to its bus slow path, recording the
instruction address there. Nothing changes without the variable.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
With REV_BOOTSTRAP_WIIMOTE=1 a bootstrap-ELF session gets the emulated Wii
Remotes of the original-IOS mode, using the identities paired in the
attached NAND's SYSCONF. The NAND is never rewritten for it; without the
variable nothing changes.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
With DOLPHIN_IPC_TRACE=1 and the original IOS on the emulated Starlet, log
each request Broadway posts (X1: command, descriptor, argument words, an
OPEN's path) and each reply Starlet posts (Y1: original command, result).
Buffer contents are never read; nothing changes without the variable.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
Recover 16 modified and 6 previously untracked integration files. All 22 source SHA-256s match the pre-publication StarletOS snapshot. Add handoff instructions, byte-preserving attributes and private backup exclusion. This commit publishes existing behavior; it does not claim a new full build or hardware qualification. The two preceding local commits and staged files were screened before publication.
Add opt-in AX88772 Ethernet with libslirp NAT, pinned Windows runtime setup and USB/network regressions. Correct Hollywood DI/reset interrupt routing and physical SRAM DMA for AES, SHA, NAND, SDIO and OHCI. Keep aligned Thumb bus accesses inside native JIT blocks.
Validated: 164 targeted tests pass. User confirmed Wii Shop connection and channel-list navigation at 100% speed / 59.96 FPS on 2026-09-12. Downloads and general channel performance remain unvalidated; local firmware, keys and runtime data are excluded.
Document the validated unmodified LetterBomb and HackMii v1.2 path through IOS58 reload, preparation, Wii Remote input and the interactive installer menu.
Boot original Wii firmware through boot0, boot1, boot2 and IOS on an emulated ARM Starlet. Model the required IPC, memory, SD, USB and Bluetooth hardware behavior, including IOS reload into IOS58, and add focused tests, launch utilities and architecture documentation.
I am not certain what this was used for, but the last non-formatting related change made to it was over 16 years ago.
The project targets Windows Vista, uses a Visual Studio 2010 project.
Looking at the entry point in `DSP_InterC.cpp`, the program opens a hardcoded path to a DSP rom in `C:\_\dsp_rom.bin` without any documentation on it whatsoever, and decodes something between two mystery addresses before exiting.
We don't have anything called $amD, though we do have $acsD. However, these instructions affect flags based on the whole accumulator, so it's better to just use $acD.
For more information, ApplyWriteBackLog, WriteToBackLog, and ZeroWriteBackLog were added in b787f5f8f7 and the explanatory comment was added in fd40513fed, although it did not mention the specific instructions that could trigger this edge case. The statements about which registers can be written by main opcodes and extension opcodes are based on my own checking of all instructions in the manual.
Yaya48andClaude Opus 5.5
Joshua Vandaële
Tillmann Karras
Maxim Cournoyer
xperia64
JosJuice
Mateus B. Cassiano
iwubcode
Vincent Pelletier
Pokechu22
Admiral H. Curtiss
Dylan Smit